Lines Matching refs:txwr
64 u32 txwr; /* 0x20C */
381 static inline u32 grcan_txspace(size_t txsize, u32 txwr, u32 eskbp)
384 u32 used = grcan_ring_sub(txwr, eskbp, txsize) / GRCAN_MSG_SIZE;
694 u32 txwr = grcan_read_reg(®s->txwr);
696 if (grcan_txspace(dma->tx.size, txwr,
829 u32 txwr = grcan_read_reg(®s->txwr);
843 grcan_write_reg(®s->txwr, txwr);
864 if (grcan_txspace(priv->dma.tx.size, txwr, priv->eskbp) &&
985 /* regs->txwr, regs->txrd and priv->eskbp already set to 0 by reset */
1267 u32 txwr, u32 oneshotmode,
1284 grcan_read_reg(®s->txrd) == txwr) {
1293 if (grcan_txspace(dma->tx.size, txwr, priv->eskbp))
1322 * regs->txwr - the next slot for the driver to put data to be sent
1326 * grcan_start_xmit can enter more messages as long as regs->txwr does
1329 * The device sends messages until regs->txrd reaches regs->txwr
1341 u32 id, txwr, txrd, space, txctrl;
1364 txwr = grcan_read_reg(®s->txwr);
1365 space = grcan_txspace(dma->tx.size, txwr, priv->eskbp);
1367 slotindex = txwr / GRCAN_MSG_SIZE;
1368 slot = dma->tx.buf + txwr;
1414 /* Bug workaround for old version of grcan where updating txwr
1416 * the current txwr could hang the can controller
1420 if (unlikely(grcan_ring_sub(txwr, txrd, dma->tx.size) == 1)) {
1423 err = grcan_txbug_workaround(dev, skb, txwr,
1444 grcan_write_reg(®s->txwr,
1445 grcan_ring_add(txwr, GRCAN_MSG_SIZE, dma->tx.size));