Lines Matching refs:nor
10 #include <linux/mtd/spi-nor.h>
77 * @nor: pointer to 'struct spi_nor'.
79 static void spansion_nor_clear_sr(struct spi_nor *nor)
81 const struct spansion_nor_params *priv_params = nor->params->priv;
84 if (nor->spimem) {
87 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
89 ret = spi_mem_exec_op(nor->spimem, &op);
91 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR,
96 dev_dbg(nor->dev, "error %d clearing SR\n", ret);
99 static int cypress_nor_sr_ready_and_clear_reg(struct spi_nor *nor, u64 addr)
101 struct spi_nor_flash_parameter *params = nor->params;
104 0, nor->bouncebuf);
107 if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {
112 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
116 if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) {
117 if (nor->bouncebuf[0] & SR_E_ERR)
118 dev_err(nor->dev, "Erase Error occurred\n");
120 dev_err(nor->dev, "Programming Error occurred\n");
122 spansion_nor_clear_sr(nor);
124 ret = spi_nor_write_disable(nor);
131 return !(nor->bouncebuf[0] & SR_WIP);
137 * @nor: pointer to 'struct spi_nor'.
141 static int cypress_nor_sr_ready_and_clear(struct spi_nor *nor)
143 struct spi_nor_flash_parameter *params = nor->params;
150 ret = cypress_nor_sr_ready_and_clear_reg(nor, addr);
160 static int cypress_nor_set_memlat(struct spi_nor *nor, u64 addr)
163 u8 *buf = nor->bouncebuf;
165 u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
170 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
181 ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
185 nor->read_dummy = 24;
190 static int cypress_nor_set_octal_dtr_bits(struct spi_nor *nor, u64 addr)
193 u8 *buf = nor->bouncebuf;
198 CYPRESS_NOR_WR_ANY_REG_OP(nor->params->addr_mode_nbytes,
201 return spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
204 static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
206 const struct spi_nor_flash_parameter *params = nor->params;
207 u8 *buf = nor->bouncebuf;
213 ret = cypress_nor_set_memlat(nor, addr);
218 ret = cypress_nor_set_octal_dtr_bits(nor, addr);
224 ret = spi_nor_read_id(nor, nor->addr_nbytes, 3, buf,
227 dev_dbg(nor->dev, "error %d reading JEDEC ID after enabling 8D-8D-8D mode\n", ret);
231 if (memcmp(buf, nor->info->id, nor->info->id_len))
237 static int cypress_nor_set_single_spi_bits(struct spi_nor *nor, u64 addr)
240 u8 *buf = nor->bouncebuf;
250 CYPRESS_NOR_WR_ANY_REG_OP(nor->addr_nbytes, addr, 2, buf);
251 return spi_nor_write_any_volatile_reg(nor, &op, SNOR_PROTO_8_8_8_DTR);
254 static int cypress_nor_octal_dtr_dis(struct spi_nor *nor)
256 const struct spi_nor_flash_parameter *params = nor->params;
257 u8 *buf = nor->bouncebuf;
263 ret = cypress_nor_set_single_spi_bits(nor, addr);
269 ret = spi_nor_read_id(nor, 0, 0, buf, SNOR_PROTO_1_1_1);
271 dev_dbg(nor->dev, "error %d reading JEDEC ID after disabling 8D-8D-8D mode\n", ret);
275 if (memcmp(buf, nor->info->id, nor->info->id_len))
281 static int cypress_nor_quad_enable_volatile_reg(struct spi_nor *nor, u64 addr)
284 u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
290 nor->bouncebuf);
292 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
296 if (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR1_QUAD_EN)
300 nor->bouncebuf[0] |= SPINOR_REG_CYPRESS_CFR1_QUAD_EN;
303 nor->bouncebuf);
304 ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
308 cfr1v_written = nor->bouncebuf[0];
313 nor->bouncebuf);
314 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
318 if (nor->bouncebuf[0] != cfr1v_written) {
319 dev_err(nor->dev, "CFR1: Read back test failed\n");
329 * @nor: pointer to a 'struct spi_nor'
340 static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
342 struct spi_nor_flash_parameter *params = nor->params;
349 ret = cypress_nor_quad_enable_volatile_reg(nor, addr);
361 * @nor: pointer to a 'struct spi_nor'
370 static int cypress_nor_determine_addr_mode_by_sr1(struct spi_nor *nor,
375 nor->bouncebuf);
379 ret = spi_nor_read_sr(nor, &nor->bouncebuf[1]);
383 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
387 is3byte = (nor->bouncebuf[0] == nor->bouncebuf[1]);
391 nor->bouncebuf);
392 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
396 is4byte = (nor->bouncebuf[0] == nor->bouncebuf[1]);
411 * @nor: pointer to a 'struct spi_nor'
419 static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)
429 ret = spi_nor_write_enable(nor);
432 ret = cypress_nor_determine_addr_mode_by_sr1(nor, &addr_mode);
434 ret = spi_nor_set_4byte_addr_mode(nor, true);
437 return spi_nor_write_disable(nor);
439 ret = spi_nor_write_disable(nor);
449 0, nor->bouncebuf);
450 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
454 if (nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR2_ADRBYT) {
456 return spi_nor_set_4byte_addr_mode(nor, true);
459 return spi_nor_set_4byte_addr_mode(nor, true);
462 nor->params->addr_nbytes = addr_mode;
463 nor->params->addr_mode_nbytes = addr_mode;
470 * @nor: pointer to a 'struct spi_nor'
478 static int cypress_nor_get_page_size(struct spi_nor *nor)
481 CYPRESS_NOR_RD_ANY_REG_OP(nor->params->addr_mode_nbytes,
482 0, 0, nor->bouncebuf);
483 struct spi_nor_flash_parameter *params = nor->params;
495 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
499 if (!(nor->bouncebuf[0] & SPINOR_REG_CYPRESS_CFR3_PGSZ))
508 static void cypress_nor_ecc_init(struct spi_nor *nor)
515 nor->params->writesize = 16;
516 nor->flags |= SNOR_F_ECC;
520 s25fs256t_post_bfpt_fixup(struct spi_nor *nor,
527 ret = cypress_nor_set_addr_mode_nbytes(nor);
533 CYPRESS_NOR_RD_ANY_REG_OP(nor->params->addr_mode_nbytes,
535 nor->bouncebuf);
536 ret = spi_nor_read_any_reg(nor, &op, nor->reg_proto);
541 if (nor->bouncebuf[0])
547 static int s25fs256t_post_sfdp_fixup(struct spi_nor *nor)
549 struct spi_nor_flash_parameter *params = nor->params;
556 params->vreg_offset = devm_kmalloc(nor->dev, sizeof(u32), GFP_KERNEL);
569 return cypress_nor_get_page_size(nor);
572 static int s25fs256t_late_init(struct spi_nor *nor)
574 cypress_nor_ecc_init(nor);
586 s25hx_t_post_bfpt_fixup(struct spi_nor *nor,
592 ret = cypress_nor_set_addr_mode_nbytes(nor);
597 nor->params->quad_enable = cypress_nor_quad_enable_volatile;
602 static int s25hx_t_post_sfdp_fixup(struct spi_nor *nor)
604 struct spi_nor_flash_parameter *params = nor->params;
609 dev_err(nor->dev, "%s failed. The volatile register offset could not be retrieved from SFDP.\n",
635 return cypress_nor_get_page_size(nor);
638 static int s25hx_t_late_init(struct spi_nor *nor)
640 struct spi_nor_flash_parameter *params = nor->params;
645 cypress_nor_ecc_init(nor);
658 * @nor: pointer to a 'struct spi_nor'
666 static int cypress_nor_set_octal_dtr(struct spi_nor *nor, bool enable)
668 return enable ? cypress_nor_octal_dtr_en(nor) :
669 cypress_nor_octal_dtr_dis(nor);
672 static int s28hx_t_post_sfdp_fixup(struct spi_nor *nor)
674 struct spi_nor_flash_parameter *params = nor->params;
677 dev_err(nor->dev, "%s failed. The volatile register offset could not be retrieved from SFDP.\n",
711 return cypress_nor_get_page_size(nor);
714 static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor,
718 return cypress_nor_set_addr_mode_nbytes(nor);
721 static int s28hx_t_late_init(struct spi_nor *nor)
723 struct spi_nor_flash_parameter *params = nor->params;
727 cypress_nor_ecc_init(nor);
739 s25fs_s_nor_post_bfpt_fixups(struct spi_nor *nor,
749 nor->params->page_size = 256;
913 * @nor: pointer to 'struct spi_nor'.
917 static int spansion_nor_sr_ready_and_clear(struct spi_nor *nor)
921 ret = spi_nor_read_sr(nor, nor->bouncebuf);
925 if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) {
926 if (nor->bouncebuf[0] & SR_E_ERR)
927 dev_err(nor->dev, "Erase Error occurred\n");
929 dev_err(nor->dev, "Programming Error occurred\n");
931 spansion_nor_clear_sr(nor);
939 ret = spi_nor_write_disable(nor);
946 return !(nor->bouncebuf[0] & SR_WIP);
949 static int spansion_nor_late_init(struct spi_nor *nor)
951 struct spi_nor_flash_parameter *params = nor->params;
953 u8 mfr_flags = nor->info->mfr_flags;
956 nor->flags |= SNOR_F_4B_OPCODES;
958 nor->erase_opcode = SPINOR_OP_SE;
959 nor->mtd.erasesize = nor->info->sector_size;
963 priv_params = devm_kmalloc(nor->dev, sizeof(*priv_params),