Lines Matching defs:nand
463 struct tegra_nand_chip *nand = to_tegra_chip(chip);
466 ctrl->cur_cs = nand->cs[die_nr];
483 struct tegra_nand_chip *nand = to_tegra_chip(chip);
486 writel_relaxed(nand->bch_config, ctrl->regs + BCH_CONFIG);
491 writel_relaxed(nand->config_ecc, ctrl->regs + CONFIG);
493 writel_relaxed(nand->config, ctrl->regs + CONFIG);
660 struct tegra_nand_chip *nand = to_tegra_chip(chip);
728 u8 *oob = chip->oob_poi + nand->ecc.offset +
919 struct tegra_nand_chip *nand = to_tegra_chip(chip);
944 nand->config |= CONFIG_BUS_WIDTH_16;
970 nand->config_ecc = CONFIG_PIPE_EN | CONFIG_SKIP_SPARE |
977 nand->config_ecc |= CONFIG_HW_ECC | CONFIG_ECC_SEL |
981 nand->config_ecc |= CONFIG_TVAL_4;
984 nand->config_ecc |= CONFIG_TVAL_6;
987 nand->config_ecc |= CONFIG_TVAL_8;
998 nand->bch_config = BCH_ENABLE;
1001 nand->bch_config |= BCH_TVAL_4;
1004 nand->bch_config |= BCH_TVAL_8;
1007 nand->bch_config |= BCH_TVAL_14;
1010 nand->bch_config |= BCH_TVAL_16;
1031 nand->config |= CONFIG_PS_256;
1034 nand->config |= CONFIG_PS_512;
1037 nand->config |= CONFIG_PS_1024;
1040 nand->config |= CONFIG_PS_2048;
1043 nand->config |= CONFIG_PS_4096;
1052 nand->config_ecc |= nand->config;
1055 nand->config |= CONFIG_TAG_BYTE_SIZE(mtd->oobsize - 1);
1056 writel_relaxed(nand->config, ctrl->regs + CONFIG);
1073 struct tegra_nand_chip *nand;
1099 nand = devm_kzalloc(dev, sizeof(*nand), GFP_KERNEL);
1100 if (!nand)
1103 nand->cs[0] = cs;
1105 nand->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_LOW);
1107 if (IS_ERR(nand->wp_gpio)) {
1108 ret = PTR_ERR(nand->wp_gpio);
1113 chip = &nand->chip;
1132 mtd_ooblayout_ecc(mtd, 0, &nand->ecc);
1165 rst = devm_reset_control_get(&pdev->dev, "nand");
1169 ctrl->clk = devm_clk_get(&pdev->dev, "nand");
1270 { .compatible = "nvidia,tegra20-nand" },
1277 .name = "tegra-nand",