Lines Matching defs:ecc
71 /* new oob placement block for use with hardware ecc generation
98 .ecc = s3c2410_ooblayout_ecc,
624 pr_debug("%s: returning ecc %*phN\n", __func__, 3, ecc_code);
634 unsigned long ecc = readl(info->regs + S3C2412_NFMECC0);
636 ecc_code[0] = ecc;
637 ecc_code[1] = ecc >> 8;
638 ecc_code[2] = ecc >> 16;
640 pr_debug("%s: returning ecc %*phN\n", __func__, 3, ecc_code);
650 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
652 ecc_code[0] = ecc;
653 ecc_code[1] = ecc >> 8;
654 ecc_code[2] = ecc >> 16;
656 pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff);
851 chip->ecc.engine_type = info->platform->engine_type;
876 switch (chip->ecc.engine_type) {
885 * to NAND_ECC_ENGINE_TYPE_SOFT. Force ecc.algo to
889 chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
894 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
895 chip->ecc.correct = s3c2410_nand_correct_data;
896 chip->ecc.strength = 1;
900 chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
901 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
905 chip->ecc.hwctl = s3c2412_nand_enable_hwecc;
906 chip->ecc.calculate = s3c2412_nand_calculate_ecc;
910 chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
911 chip->ecc.calculate = s3c2440_nand_calculate_ecc;
921 chip->ecc.size = 256;
922 chip->ecc.bytes = 3;
924 chip->ecc.size = 512;
925 chip->ecc.bytes = 3;