Lines Matching defs:controller
102 /* controller and mtd information */
134 * struct s3c2410_nand_info - NAND controller state.
135 * @controller: Base controller structure.
136 * @mtds: An array of MTD instances on this controller.
139 * @clk: The clock resource for this controller.
143 * @mtd_count: The number of MTDs created from this controller.
147 * @cpu_type: The exact type of this controller.
152 struct nand_controller controller;
220 * @info: The controller instance.
274 /* controller setup */
277 * s3c2410_nand_setrate - setup controller timing information.
278 * @info: The controller instance.
293 /* calculate the timing information for the controller */
363 * to setup the hardware access speeds and set the controller to be enabled.
380 /* enable the controller and de-assert nFCE */
578 * These allow the s3c2410 and s3c2440 to use the controller's ECC
662 * use read/write block to move the data buffers to/from the controller
781 * @info: The base NAND controller the chip is on.
782 * @nmtd: The new controller MTD instance to fill in.
805 chip->controller = &info->controller;
1045 nand_controller_init(&info->controller);
1046 info->controller.ops = &s3c24xx_nand_controller_ops;