Lines Matching refs:pl35x_nandc
126 * struct pl35x_nandc - NAND flash controller driver structure
136 struct pl35x_nandc {
147 static inline struct pl35x_nandc *to_pl35x_nandc(struct nand_controller *ctrl)
149 return container_of(ctrl, struct pl35x_nandc, controller);
214 static void pl35x_smc_update_regs(struct pl35x_nandc *nfc)
221 static int pl35x_smc_set_buswidth(struct pl35x_nandc *nfc, unsigned int bw)
232 static void pl35x_smc_clear_irq(struct pl35x_nandc *nfc)
238 static int pl35x_smc_wait_for_irq(struct pl35x_nandc *nfc)
256 static int pl35x_smc_wait_for_ecc_done(struct pl35x_nandc *nfc)
271 static int pl35x_smc_set_ecc_mode(struct pl35x_nandc *nfc,
297 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
315 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
335 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
367 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
394 static int pl35x_nand_correct_data(struct pl35x_nandc *nfc, unsigned char *buf,
448 static int pl35x_nand_read_eccbytes(struct pl35x_nandc *nfc,
466 static int pl35x_nand_recover_data_hwecc(struct pl35x_nandc *nfc,
506 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
597 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
665 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
787 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
868 static void pl35x_smc_set_ecc_pg_size(struct pl35x_nandc *nfc,
896 static int pl35x_nand_init_hw_ecc_controller(struct pl35x_nandc *nfc,
943 struct pl35x_nandc *nfc = to_pl35x_nandc(chip->controller);
1000 static int pl35x_nand_reset_state(struct pl35x_nandc *nfc)
1038 static int pl35x_nand_chip_init(struct pl35x_nandc *nfc,
1097 static void pl35x_nand_chips_cleanup(struct pl35x_nandc *nfc)
1112 static int pl35x_nand_chips_init(struct pl35x_nandc *nfc)
1140 struct pl35x_nandc *nfc;
1175 struct pl35x_nandc *nfc = platform_get_drvdata(pdev);