Lines Matching refs:chip
29 static int toshiba_nand_benand_read_eccstatus_op(struct nand_chip *chip,
34 if (nand_has_exec_op(chip)) {
36 nand_get_sdr_timings(nand_get_interface_config(chip));
40 NAND_OP_8BIT_DATA_IN(chip->ecc.steps, ecc_status, 0),
42 struct nand_operation op = NAND_OPERATION(chip->cur_cs, instrs);
44 return nand_exec_op(chip, &op);
50 static int toshiba_nand_benand_eccstatus(struct nand_chip *chip)
52 struct mtd_info *mtd = nand_to_mtd(chip);
58 ret = toshiba_nand_benand_read_eccstatus_op(chip, ecc_status);
62 for (i = 0; i < chip->ecc.steps; i++) {
79 ret = nand_status_op(chip, &status);
96 toshiba_nand_read_page_benand(struct nand_chip *chip, uint8_t *buf,
101 ret = nand_read_page_raw(chip, buf, oob_required, page);
105 return toshiba_nand_benand_eccstatus(chip);
109 toshiba_nand_read_subpage_benand(struct nand_chip *chip, uint32_t data_offs,
114 ret = nand_read_page_op(chip, page, data_offs,
119 return toshiba_nand_benand_eccstatus(chip);
122 static void toshiba_nand_benand_init(struct nand_chip *chip)
124 struct mtd_info *mtd = nand_to_mtd(chip);
130 * This is why chip->ecc.bytes = 0.
132 chip->ecc.bytes = 0;
133 chip->ecc.size = 512;
134 chip->ecc.strength = 8;
135 chip->ecc.read_page = toshiba_nand_read_page_benand;
136 chip->ecc.read_subpage = toshiba_nand_read_subpage_benand;
137 chip->ecc.write_page = nand_write_page_raw;
138 chip->ecc.read_page_raw = nand_read_page_raw_notsupp;
139 chip->ecc.write_page_raw = nand_write_page_raw_notsupp;
141 chip->options |= NAND_SUBPAGE_READ;
146 static void toshiba_nand_decode_id(struct nand_chip *chip)
148 struct nand_device *base = &chip->base;
150 struct mtd_info *mtd = nand_to_mtd(chip);
153 memorg = nanddev_get_memorg(&chip->base);
155 nand_decode_ext_id(chip);
165 if (chip->id.len >= 6 && nand_is_slc(chip) &&
166 (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
167 !(chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND) /* !BENAND */) {
179 if (chip->id.len >= 6 && nand_is_slc(chip)) {
181 switch (chip->id.data[5] & 0x7) {
202 tc58teg5dclta00_choose_interface_config(struct nand_chip *chip,
205 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, 5);
207 return nand_choose_best_sdr_timings(chip, iface, NULL);
211 tc58nvg0s3e_choose_interface_config(struct nand_chip *chip,
214 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, 2);
216 return nand_choose_best_sdr_timings(chip, iface, NULL);
220 th58nvg2s3hbai4_choose_interface_config(struct nand_chip *chip,
226 onfi_fill_interface_config(chip, iface, NAND_SDR_IFACE, 4);
243 return nand_choose_best_sdr_timings(chip, iface, sdr);
246 static int tc58teg5dclta00_init(struct nand_chip *chip)
248 struct mtd_info *mtd = nand_to_mtd(chip);
250 chip->ops.choose_interface_config =
252 chip->options |= NAND_NEED_SCRAMBLING;
258 static int tc58nvg0s3e_init(struct nand_chip *chip)
260 chip->ops.choose_interface_config =
266 static int th58nvg2s3hbai4_init(struct nand_chip *chip)
268 chip->ops.choose_interface_config =
274 static int toshiba_nand_init(struct nand_chip *chip)
276 if (nand_is_slc(chip))
277 chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
279 /* Check that chip is BENAND and ECC mode is on-die */
280 if (nand_is_slc(chip) &&
281 chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE &&
282 chip->id.data[4] & TOSHIBA_NAND_ID4_IS_BENAND)
283 toshiba_nand_benand_init(chip);
285 if (!strcmp("TC58TEG5DCLTA00", chip->parameters.model))
286 tc58teg5dclta00_init(chip);
287 if (!strncmp("TC58NVG0S3E", chip->parameters.model,
289 tc58nvg0s3e_init(chip);
290 if ((!strncmp("TH58NVG2S3HBAI4", chip->parameters.model,
292 (!strncmp("TH58NVG3S0HBAI4", chip->parameters.model,
294 th58nvg2s3hbai4_init(chip);