Lines Matching defs:page

17  *	rework for 2K page size chips
20 * Enable cached programming for 2k page size chips
50 static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page,
56 if (page == lastpage)
59 if (!page || (page & 1)) {
61 info->pair = (page + 1) / 2;
64 info->pair = (page + 1 - dist) / 2;
74 int page = info->pair * 2;
84 page--;
86 page += dist - 1;
88 if (page >= mtd->erasesize / mtd->writesize)
91 return page;
218 * nand_bbm_get_next_page - Get the next page for bad block markers
220 * @page: First page to start checking for bad block marker usage
222 * Returns an integer that corresponds to the page offset within a block, for
223 * a page that is used to store bad block markers. If no more pages are
226 int nand_bbm_get_next_page(struct nand_chip *chip, int page)
234 if (page == 0 && !(chip->options & bbm_flags))
236 if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE)
238 if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE)
240 if (page <= last_page && chip->options & NAND_BBM_LASTPAGE)
428 int chipnr, page, status, len, ret;
435 /* Do not allow write past end of page */
437 pr_debug("%s: attempt to write past end of page\n",
450 * of my DiskOnChip 2000 test units) will clear the whole data page too
460 /* Shift to get page */
461 page = (int)(to >> chip->page_shift);
469 /* Invalidate the page cache, if we write to the cached page */
470 if (page == chip->pagecache.page)
471 chip->pagecache.page = -1;
476 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask);
478 status = chip->ecc.write_oob(chip, page & chip->pagemask);
849 * fail anyway as the parameter page is not available yet.
1081 * @offset_in_page: The offset in the page
1084 * on the NAND bus width and the page size.
1094 /* Make sure the offset is less than the actual page size. */
1099 * On small page NANDs, there's a dedicated command to access the OOB
1101 * area, not the start of the page. Asjust the address accordingly.
1107 * The offset in page is expressed in bytes, if the NAND bus is 16-bit
1120 * Small page NANDs use 1 cycle for the columns, while large page NANDs
1131 static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
1163 addrs[1] = page;
1164 addrs[2] = page >> 8;
1167 addrs[3] = page >> 16;
1174 static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page,
1200 addrs[2] = page;
1201 addrs[3] = page >> 8;
1204 addrs[4] = page >> 16;
1228 static int nand_lp_exec_cont_read_page_op(struct nand_chip *chip, unsigned int page,
1246 NAND_OP_CMD(page == chip->cont_read.pause_page ?
1266 addrs[2] = page;
1267 addrs[3] = page >> 8;
1270 addrs[4] = page >> 16;
1282 if (page == chip->cont_read.first_page)
1292 if (page == chip->cont_read.pause_page &&
1293 page != chip->cont_read.last_page) {
1296 } else if (page == chip->cont_read.last_page) {
1303 static bool rawnand_cont_read_ongoing(struct nand_chip *chip, unsigned int page)
1305 return chip->cont_read.ongoing && page >= chip->cont_read.first_page;
1311 * @page: page to read
1312 * @offset_in_page: offset within the page
1321 int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1334 if (rawnand_cont_read_ongoing(chip, page))
1335 return nand_lp_exec_cont_read_page_op(chip, page,
1339 return nand_lp_exec_read_page_op(chip, page,
1344 return nand_sp_exec_read_page_op(chip, page, offset_in_page,
1348 chip->legacy.cmdfunc(chip, NAND_CMD_READ0, offset_in_page, page);
1359 * @page: parameter page to read
1368 int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
1382 NAND_OP_ADDR(1, &page,
1397 chip->legacy.cmdfunc(chip, NAND_CMD_PARAM, page, -1);
1407 * @offset_in_page: offset within the page
1429 /* Small page NANDs do not support column change. */
1471 * @page: page to read
1481 int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1493 return nand_read_page_op(chip, page,
1497 chip->legacy.cmdfunc(chip, NAND_CMD_READOOB, offset_in_oob, page);
1505 static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page,
1516 * with a large page NAND and adjusted if we're dealing
1517 * with a small page NAND and the page offset is > 255.
1533 addrs[naddrs++] = page;
1534 addrs[naddrs++] = page >> 8;
1536 addrs[naddrs++] = page >> 16;
1540 /* Drop the last two instructions if we're not programming the page. */
1551 * first instruction depending on the page offset we're trying
1561 * Drop the first command if we're dealing with a large page
1574 * @page: page to write
1575 * @offset_in_page: offset within the page
1576 * @buf: buffer containing the data to write to the page
1584 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1597 return nand_exec_prog_page_op(chip, page, offset_in_page, buf,
1600 chip->legacy.cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page);
1660 * @page: page to write
1661 * @offset_in_page: offset within the page
1662 * @buf: buffer containing the data to write to the page
1670 int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1685 ret = nand_exec_prog_page_op(chip, page, offset_in_page, buf,
1695 page);
1715 * @offset_in_page: offset within the page
1738 /* Small page NANDs do not support column change. */
1933 unsigned int page = eraseblock <<
1941 u8 addrs[3] = { page, page >> 8, page >> 16 };
1963 chip->legacy.cmdfunc(chip, NAND_CMD_ERASE1, -1, page);
2833 * different from the NAND page size. When fixing bitflips, ECC engines will
2835 * expect you to return the maximum number of bitflips for the whole page.
2837 * not on the whole page. After checking each chunk you should update your
2892 * nand_read_page_raw_notsupp - dummy read raw page function
2896 * @page: page number to read
2901 int oob_required, int page)
2907 * nand_read_page_raw - [INTERN] read raw page data without ecc
2911 * @page: page number to read
2916 int page)
2921 ret = nand_read_page_op(chip, page, 0, buf, mtd->writesize);
2937 * nand_monolithic_read_page_raw - Monolithic page read in raw mode
2941 * @page: page number to read
2943 * This is a raw page read, ie. without any error detection/correction.
2952 int oob_required, int page)
2966 ret = nand_read_page_op(chip, page, 0, read_buf, size);
2978 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
2982 * @page: page number to read
2987 int oob_required, int page)
2995 ret = nand_read_page_op(chip, page, 0, NULL, 0);
3042 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
3046 * @page: page number to read
3049 int oob_required, int page)
3060 chip->ecc.read_page_raw(chip, buf, 1, page);
3088 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
3090 * @data_offs: offset of requested data within the page
3093 * @page: page number to read
3096 uint32_t readlen, uint8_t *bufpoi, int page)
3108 /* Column address within the page aligned to ECC size (256bytes) */
3119 /* If we read not a page aligned data */
3121 ret = nand_read_page_op(chip, page, data_col_addr, p, datafrag_len);
3199 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
3203 * @page: page number to read
3208 int oob_required, int page)
3219 ret = nand_read_page_op(chip, page, 0, NULL, 0);
3270 * nand_read_page_hwecc_oob_first - Hardware ECC page read with ECC
3275 * @page: page number to read
3277 * Hardware ECC for large page chips, which requires the ECC data to be
3281 int oob_required, int page)
3292 ret = nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
3296 /* Move read cursor to start of page */
3337 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
3341 * @page: page number to read
3347 int oob_required, int page)
3358 ret = nand_read_page_op(chip, page, 0, NULL, 0);
3460 static void rawnand_enable_cont_reads(struct nand_chip *chip, unsigned int page,
3475 page++;
3480 if (page + 1 > end_page)
3483 chip->cont_read.first_page = page;
3490 static void rawnand_cont_read_skip_first_page(struct nand_chip *chip, unsigned int page)
3492 if (!chip->cont_read.ongoing || page != chip->cont_read.first_page)
3508 * when there are too many bitflips in a page (i.e., ECC error). After setting
3509 * a new threshold, the host should retry reading the page.
3546 int chipnr, page, realpage, col, bytes, aligned, oob_required;
3567 page = realpage & chip->pagemask;
3575 rawnand_enable_cont_reads(chip, page, readlen, col);
3592 /* Is the current page in the buffer? */
3593 if (realpage != chip->pagecache.page || oob) {
3602 * Now read the page into the buffer. Absent an error,
3608 page);
3612 bufpoi, page);
3615 oob_required, page);
3618 /* Invalidate page cache */
3619 chip->pagecache.page = -1;
3631 chip->pagecache.page = realpage;
3634 /* Invalidate page cache */
3635 chip->pagecache.page = -1;
3677 rawnand_cont_read_skip_first_page(chip, page);
3693 /* For subsequent reads align to page boundary */
3695 /* Increment page address */
3698 page = realpage & chip->pagemask;
3700 if (!page) {
3724 * @page: page number to read
3726 int nand_read_oob_std(struct nand_chip *chip, int page)
3730 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
3738 * @page: page number to read
3740 static int nand_read_oob_syndrome(struct nand_chip *chip, int page)
3749 ret = nand_read_page_op(chip, page, chip->ecc.size, NULL, 0);
3763 ret = nand_read_page_op(chip, page, pos, NULL,
3791 * @page: page number to write
3793 int nand_write_oob_std(struct nand_chip *chip, int page)
3797 return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi,
3804 * with syndrome - only for large page flash
3806 * @page: page number to write
3808 static int nand_write_oob_syndrome(struct nand_chip *chip, int page)
3827 ret = nand_prog_page_begin_op(chip, page, pos, NULL, 0);
3888 int page, realpage, chipnr;
3909 /* Shift to get page */
3911 page = realpage & chip->pagemask;
3915 ret = chip->ecc.read_oob_raw(chip, page);
3917 ret = chip->ecc.read_oob(chip, page);
3933 /* Increment page address */
3936 page = realpage & chip->pagemask;
3938 if (!page) {
4000 * nand_write_page_raw_notsupp - dummy raw page write function
4004 * @page: page number to write
4009 int oob_required, int page)
4015 * nand_write_page_raw - [INTERN] raw page write function
4019 * @page: page number to write
4024 int oob_required, int page)
4029 ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);
4045 * nand_monolithic_write_page_raw - Monolithic page write in raw mode
4049 * @page: page number to write
4051 * This is a raw page write, ie. without any error detection/correction.
4061 int oob_required, int page)
4076 return nand_prog_page_op(chip, page, 0, write_buf, size);
4081 * nand_write_page_raw_syndrome - [INTERN] raw page write function
4085 * @page: page number to write
4091 int page)
4099 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
4145 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
4149 * @page: page number to write
4152 int oob_required, int page)
4170 return chip->ecc.write_page_raw(chip, buf, 1, page);
4174 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
4178 * @page: page number to write
4181 int oob_required, int page)
4190 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
4220 * @offset: column address of subpage within the page
4224 * @page: page number to write
4228 int oob_required, int page)
4241 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
4270 /* copy calculated ECC for whole page to chip->buffer->oob */
4288 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
4292 * @page: page number to write
4298 int oob_required, int page)
4308 ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0);
4358 * nand_write_page - write one page
4360 * @offset: address offset within the page
4364 * @page: page number to write
4369 int page, int raw)
4382 page);
4385 oob_required, page);
4387 status = chip->ecc.write_page(chip, buf, oob_required, page);
4409 int chipnr, realpage, page, column;
4424 /* Reject writes, which are not page aligned */
4426 pr_notice("%s: attempt to write non page aligned data\n",
4447 page = realpage & chip->pagemask;
4449 /* Invalidate the page cache, when we write to the cached page */
4450 if (to <= ((loff_t)chip->pagecache.page << chip->page_shift) &&
4451 ((loff_t)chip->pagecache.page << chip->page_shift) < (to + ops->len))
4452 chip->pagecache.page = -1;
4476 * Copy the data from the initial buffer when doing partial page
4499 oob_required, page,
4512 page = realpage & chip->pagemask;
4514 if (!page) {
4624 int page, pages_per_block, ret, chipnr;
4641 /* Shift to get first page */
4642 page = (int)(instr->addr >> chip->page_shift);
4663 loff_t ofs = (loff_t)page << chip->page_shift;
4666 if (nand_block_checkbad(chip, ((loff_t) page) <<
4675 * Invalidate the page cache, if we erase the block which
4676 * contains the current cached page.
4678 if (page <= chip->pagecache.page && chip->pagecache.page <
4679 (page + pages_per_block))
4680 chip->pagecache.page = -1;
4682 ret = nand_erase_op(chip, (page & chip->pagemask) >>
4685 pr_debug("%s: failed erase, page 0x%08x\n",
4686 __func__, page);
4691 /* Increment page address and decrement length */
4693 page += pages_per_block;
4696 if (len && !(page & chip->pagemask)) {
4833 * @len: number of bytes to lock (must be a multiple of block/page size)
4849 * @len: number of bytes to unlock (must be a multiple of block/page size)
5020 /* All legacy ID NAND are small-page, SLC */
5027 * page size, cell-type information).
5351 /* Calculate the address shift from the page size */
5377 pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n",
5837 /* Use standard hwecc read page function? */
5865 /* Use standard syndrome read/write page function? */
6049 /* number of correctable bits the chip requires in a page */
6294 /* Set the internal oob buffer location, just after the page data */
6320 * page with ECC layout when ->oobsize <= 128 for
6355 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
6418 * Set the number of read / write steps for one page depending on ECC
6473 chip->pagecache.page = -1;
6475 /* Large page NAND with SOFT_ECC should support subpage reads */