Lines Matching refs:fun
42 static int fun_chip_init(struct fsl_upm_nand *fun,
46 struct mtd_info *mtd = nand_to_mtd(&fun->chip);
50 fun->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
51 fun->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
52 fun->chip.controller = &fun->base;
53 mtd->dev.parent = fun->dev;
59 nand_set_flash_node(&fun->chip, flash_np);
60 mtd->name = devm_kasprintf(fun->dev, GFP_KERNEL, "0x%llx.%pOFn",
68 ret = nand_scan(&fun->chip, fun->mchip_count);
81 struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
82 u32 mar, reg_offs = fun->mchip_offsets[fun->mchip_number];
89 fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
90 mar = (instr->ctx.cmd.opcode << (32 - fun->upm.width)) |
92 fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar);
93 fsl_upm_end_pattern(&fun->upm);
97 fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
99 mar = (instr->ctx.addr.addrs[i] << (32 - fun->upm.width)) |
101 fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar);
103 fsl_upm_end_pattern(&fun->upm);
109 in[i] = in_8(fun->io_base + reg_offs);
115 out_8(fun->io_base + reg_offs, out[i]);
119 if (!fun->rnb_gpio[fun->mchip_number])
122 return nand_gpio_waitrdy(chip, fun->rnb_gpio[fun->mchip_number],
135 struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
145 fun->mchip_number = op->cs;
165 struct fsl_upm_nand *fun;
172 fun = devm_kzalloc(&ofdev->dev, sizeof(*fun), GFP_KERNEL);
173 if (!fun)
176 fun->io_base = devm_platform_get_and_ioremap_resource(ofdev, 0, &io_res);
177 if (IS_ERR(fun->io_base))
178 return PTR_ERR(fun->io_base);
180 ret = fsl_upm_find(io_res->start, &fun->upm);
192 fun->upm_addr_offset = *prop;
199 fun->upm_cmd_offset = *prop;
204 fun->mchip_count = size / sizeof(uint32_t);
205 if (fun->mchip_count >= NAND_MAX_CHIPS) {
209 for (i = 0; i < fun->mchip_count; i++)
210 fun->mchip_offsets[i] = be32_to_cpu(prop[i]);
212 fun->mchip_count = 1;
215 for (i = 0; i < fun->mchip_count; i++) {
216 fun->rnb_gpio[i] = devm_gpiod_get_index_optional(&ofdev->dev,
219 if (IS_ERR(fun->rnb_gpio[i])) {
221 return PTR_ERR(fun->rnb_gpio[i]);
225 nand_controller_init(&fun->base);
226 fun->base.ops = &fun_ops;
227 fun->dev = &ofdev->dev;
229 ret = fun_chip_init(fun, ofdev->dev.of_node, io_res);
233 dev_set_drvdata(&ofdev->dev, fun);
240 struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
241 struct nand_chip *chip = &fun->chip;