Lines Matching refs:SDMMC_CTLR
36 #define SDMMC_CTLR 0x00
58 /* SDMMC_CTLR bit fields */
249 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
250 writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);
267 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
268 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);
280 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
282 priv->sdmmc_base + SDMMC_CTLR);
473 reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);
474 writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);