Lines Matching refs:value
236 u32 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
246 value &= ~SPMMC_CLOCK_DIVISION;
247 value |= FIELD_PREP(SPMMC_CLOCK_DIVISION, clkdiv);
248 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
253 u32 value = readl(host->base + SPMMC_SD_CONFIG1_REG);
281 value |= SPMMC_SD_HIGH_SPEED_EN;
282 writel(value, host->base + SPMMC_SD_CONFIG1_REG);
283 value = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
284 value &= ~SPMMC_SD_WRITE_DATA_DELAY;
285 value |= FIELD_PREP(SPMMC_SD_WRITE_DATA_DELAY, delay);
286 value &= ~SPMMC_SD_WRITE_COMMAND_DELAY;
287 value |= FIELD_PREP(SPMMC_SD_WRITE_COMMAND_DELAY, delay);
288 writel(value, host->base + SPMMC_SD_TIMING_CONFIG0_REG);
290 value &= ~SPMMC_SD_HIGH_SPEED_EN;
291 writel(value, host->base + SPMMC_SD_CONFIG1_REG);
294 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
295 value |= SPMMC_SD_DDR_MODE;
296 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
298 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
299 value &= ~SPMMC_SD_DDR_MODE;
300 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
306 u32 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
310 value &= ~SPMMC_SD_DATA_WD;
311 value |= SPMMC_MMC8_EN;
314 value |= SPMMC_SD_DATA_WD;
315 value &= ~SPMMC_MMC8_EN;
318 value &= ~SPMMC_SD_DATA_WD;
319 value &= ~SPMMC_MMC8_EN;
322 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
330 u32 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
332 value |= SPMMC_SD_MMC_MODE;
333 value &= ~SPMMC_SDIO_MODE;
334 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
339 u32 value;
346 value = readl(host->base + SPMMC_HW_DMA_CTRL_REG);
347 value |= SPMMC_DMAIDLE;
348 writel(value, host->base + SPMMC_HW_DMA_CTRL_REG);
349 value &= ~SPMMC_DMAIDLE;
350 writel(value, host->base + SPMMC_HW_DMA_CTRL_REG);
351 value = readl(host->base + SPMMC_HW_DMA_CTRL_REG);
352 value |= SPMMC_HW_DMA_RST;
353 writel(value, host->base + SPMMC_HW_DMA_CTRL_REG);
355 readl_poll_timeout_atomic(host->base + SPMMC_SD_HW_STATE_REG, value,
356 !(value & BIT(6)), 1, SPMMC_TIMEOUT_US);
361 u32 value;
364 value = ((cmd->opcode | 0x40) << 24) | (cmd->arg >> 8);
365 writel(value, host->base + SPMMC_SD_CMDBUF0_3_REG);
369 value = readl(host->base + SPMMC_SD_INT_REG);
370 value |= SPMMC_SDINT_SDCMPCLR;
371 value &= ~SPMMC_SDINT_SDCMPEN;
372 writel(value, host->base + SPMMC_SD_INT_REG);
374 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
375 value &= ~SPMMC_SD_TRANS_MODE;
376 value |= SPMMC_SD_CMD_DUMMY;
378 value |= SPMMC_SD_AUTO_RESPONSE;
380 value &= ~SPMMC_SD_AUTO_RESPONSE;
381 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
390 value |= SPMMC_SD_RSP_CHK_EN;
392 value &= ~SPMMC_SD_RSP_CHK_EN;
395 value |= SPMMC_SD_RSP_TYPE;
397 value &= ~SPMMC_SD_RSP_TYPE;
398 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
403 u32 value, srcdst;
407 value = readl(host->base + SPMMC_SD_CONFIG0_REG);
409 value &= ~SPMMC_SD_TRANS_MODE;
410 value |= FIELD_PREP(SPMMC_SD_TRANS_MODE, 2);
411 value &= ~SPMMC_SD_AUTO_RESPONSE;
412 value &= ~SPMMC_SD_CMD_DUMMY;
420 value &= ~SPMMC_SD_TRANS_MODE;
421 value |= FIELD_PREP(SPMMC_SD_TRANS_MODE, 1);
430 value |= SPMMC_SD_LEN_MODE;
473 value &= ~SPMMC_SD_PIO_MODE;
474 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
478 value = readl(host->base + SPMMC_SD_INT_REG);
479 value &= ~SPMMC_SDINT_SDCMPEN;
480 value |= FIELD_PREP(SPMMC_SDINT_SDCMPEN, 1); /* sdcmpen */
481 writel(value, host->base + SPMMC_SD_INT_REG);
484 value |= SPMMC_SD_PIO_MODE;
485 value |= SPMMC_RX4_EN;
486 writel(value, host->base + SPMMC_SD_CONFIG0_REG);
492 u32 value = readl(host->base + SPMMC_SD_CTRL_REG);
494 value |= SPMMC_NEW_COMMAND_TRIGGER;
495 writel(value, host->base + SPMMC_SD_CTRL_REG);
501 u32 value;
507 value = readl(host->base + SPMMC_SD_INT_REG);
508 value &= ~SPMMC_SDINT_SDCMPEN;
509 value |= FIELD_PREP(SPMMC_SDINT_SDCMPEN, 0);
510 writel(value, host->base + SPMMC_SD_INT_REG);
512 readl_poll_timeout(host->base + SPMMC_SD_STATE_REG, value,
513 (value & SPMMC_SDSTATE_FINISH), 1, SPMMC_TIMEOUT_US);
522 u32 value = readl(host->base + SPMMC_SD_STATE_REG);
523 u32 crc_token = FIELD_GET(SPMMC_CRCTOKEN_CHECK_RESULT, value);
525 if (value & SPMMC_SDSTATE_ERROR) {
528 value = readl(host->base + SPMMC_SD_STATUS_REG);
544 if (value & SPMMC_SDSTATUS_RSP_TIMEOUT) {
547 } else if (value & SPMMC_SDSTATUS_RSP_CRC7_ERROR) {
551 if ((value & SPMMC_SDSTATUS_STB_TIMEOUT)) {
554 } else if (value & SPMMC_SDSTATUS_RDATA_CRC16_ERROR) {
557 } else if (value & SPMMC_SDSTATUS_CARD_CRC_CHECK_TIMEOUT) {
560 } else if (value & SPMMC_SDSTATUS_CRC_TOKEN_CHECK_ERROR) {
611 int f, w, value;
617 value = ((1 << w) - 1) << f;
618 if (0xff == (value & ~candidate_dly))
668 u32 value;
676 value = readl(host->base + SPMMC_CARD_MEDIATYPE_SRCDST_REG);
677 value &= ~SPMMC_MEDIA_TYPE;
678 value |= FIELD_PREP(SPMMC_MEDIA_TYPE, SPMMC_MEDIA_SD);
679 writel(value, host->base + SPMMC_CARD_MEDIATYPE_SRCDST_REG);
716 u32 value = readl(host->base + SPMMC_SD_INT_REG);
718 if ((value & SPMMC_SDINT_SDCMP) && (value & SPMMC_SDINT_SDCMPEN)) {
719 value &= ~SPMMC_SDINT_SDCMPEN;
720 value |= SPMMC_SDINT_SDCMPCLR;
721 writel(value, host->base + SPMMC_SD_INT_REG);
751 u32 value;
753 value = readl(host->base + SPMMC_SD_INT_REG);
754 value &= ~SPMMC_SDINT_SDCMPEN;
755 writel(value, host->base + SPMMC_SD_INT_REG);
788 * or a negative errno value when something bad happened
807 u32 value;
811 value = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
812 value &= ~SPMMC_SD_READ_RESPONSE_DELAY;
813 value |= FIELD_PREP(SPMMC_SD_READ_RESPONSE_DELAY, smpl_dly);
814 value &= ~SPMMC_SD_READ_DATA_DELAY;
815 value |= FIELD_PREP(SPMMC_SD_READ_DATA_DELAY, smpl_dly);
816 value &= ~SPMMC_SD_READ_CRC_DELAY;
817 value |= FIELD_PREP(SPMMC_SD_READ_CRC_DELAY, smpl_dly);
818 writel(value, host->base + SPMMC_SD_TIMING_CONFIG0_REG);
829 value = readl(host->base + SPMMC_SD_TIMING_CONFIG0_REG);
830 value &= ~SPMMC_SD_READ_RESPONSE_DELAY;
831 value |= FIELD_PREP(SPMMC_SD_READ_RESPONSE_DELAY, smpl_dly);
832 value &= ~SPMMC_SD_READ_DATA_DELAY;
833 value |= FIELD_PREP(SPMMC_SD_READ_DATA_DELAY, smpl_dly);
834 value &= ~SPMMC_SD_READ_CRC_DELAY;
835 value |= FIELD_PREP(SPMMC_SD_READ_CRC_DELAY, smpl_dly);
836 writel(value, host->base + SPMMC_SD_TIMING_CONFIG0_REG);