Lines Matching defs:host
12 #include <linux/mmc/host.h>
91 int flags; /* backup of host attribute */
117 #define TO_SPRD_HOST(host) sdhci_pltfm_priv(sdhci_priv(host))
119 static void sdhci_sprd_init_config(struct sdhci_host *host)
124 val = sdhci_readl(host, SDHCI_SPRD_REG_DEBOUNCE);
126 sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE);
129 static inline u32 sdhci_sprd_readl(struct sdhci_host *host, int reg)
134 return readl_relaxed(host->ioaddr + reg);
137 static inline void sdhci_sprd_writel(struct sdhci_host *host, u32 val, int reg)
146 writel_relaxed(val, host->ioaddr + reg);
149 static inline void sdhci_sprd_writew(struct sdhci_host *host, u16 val, int reg)
155 writew_relaxed(val, host->ioaddr + reg);
158 static inline void sdhci_sprd_writeb(struct sdhci_host *host, u8 val, int reg)
169 if (readb_relaxed(host->ioaddr + reg) & SDHCI_HW_RESET_CARD)
173 writeb_relaxed(val, host->ioaddr + reg);
176 static inline void sdhci_sprd_sd_clk_off(struct sdhci_host *host)
178 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
181 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
184 static inline void sdhci_sprd_sd_clk_on(struct sdhci_host *host)
188 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
190 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL);
194 sdhci_sprd_set_dll_invert(struct sdhci_host *host, u32 mask, bool en)
198 dll_dly_offset = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET);
203 sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET);
230 static inline void _sdhci_sprd_set_clock(struct sdhci_host *host,
233 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
236 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
240 sdhci_enable_clk(host, div);
242 val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);
248 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI);
253 sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI);
258 static void sdhci_sprd_enable_phy_dll(struct sdhci_host *host)
262 tmp = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_CFG);
264 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG);
268 tmp = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_CFG);
271 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG);
275 tmp = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_CFG);
277 sdhci_writel(host, tmp, SDHCI_SPRD_REG_32_DLL_CFG);
282 2000, USEC_PER_SEC, false, host, SDHCI_SPRD_REG_32_DLL_STS0)) {
283 pr_err("%s: DLL locked fail!\n", mmc_hostname(host->mmc));
285 mmc_hostname(host->mmc),
286 sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_STS0),
287 sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_CFG));
291 static void sdhci_sprd_set_clock(struct sdhci_host *host, unsigned int clock)
296 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
297 } else if (clock != host->clock) {
298 sdhci_sprd_sd_clk_off(host);
299 _sdhci_sprd_set_clock(host, clock);
303 sdhci_sprd_set_dll_invert(host, SDHCI_SPRD_BIT_CMD_DLY_INV |
307 _sdhci_sprd_set_clock(host, clock);
311 * According to the Spreadtrum SD host specification, when we changed
317 sdhci_sprd_enable_phy_dll(host);
320 static unsigned int sdhci_sprd_get_max_clock(struct sdhci_host *host)
322 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
327 static unsigned int sdhci_sprd_get_min_clock(struct sdhci_host *host)
332 static void sdhci_sprd_set_uhs_signaling(struct sdhci_host *host,
335 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
336 struct mmc_host *mmc = host->mmc;
340 if (timing == host->timing)
343 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
344 /* Select Bus Speed Mode for host */
375 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
378 sdhci_writel(host, p[timing], SDHCI_SPRD_REG_32_DLL_DLY);
381 static void sdhci_sprd_hw_reset(struct sdhci_host *host)
391 val = readb_relaxed(host->ioaddr + SDHCI_SOFTWARE_RESET);
393 writeb_relaxed(val, host->ioaddr + SDHCI_SOFTWARE_RESET);
398 writeb_relaxed(val, host->ioaddr + SDHCI_SOFTWARE_RESET);
402 static unsigned int sdhci_sprd_get_max_timeout_count(struct sdhci_host *host)
408 static unsigned int sdhci_sprd_get_ro(struct sdhci_host *host)
413 static void sdhci_sprd_request_done(struct sdhci_host *host,
417 if (mmc_hsq_finalize_request(host->mmc, mrq))
420 mmc_request_done(host->mmc, mrq);
423 static void sdhci_sprd_set_power(struct sdhci_host *host, unsigned char mode,
426 struct mmc_host *mmc = host->mmc;
430 mmc_regulator_set_ocr(host->mmc, mmc->supply.vmmc, 0);
438 mmc_regulator_set_ocr(host->mmc, mmc->supply.vmmc, vdd);
464 struct sdhci_host *host = mmc_priv(mmc);
465 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
467 host->flags |= sprd_host->flags & SDHCI_AUTO_CMD23;
472 * CMD23 argument on Spreadtrum's sd host controller.
474 if (host->version >= SDHCI_SPEC_410 &&
476 (host->flags & SDHCI_AUTO_CMD23))
477 host->flags &= ~SDHCI_AUTO_CMD23;
497 struct sdhci_host *host = mmc_priv(mmc);
498 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
541 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
549 struct sdhci_host *host = mmc_priv(mmc);
550 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
557 sdhci_sprd_sd_clk_off(host);
560 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
563 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
565 sdhci_sprd_sd_clk_on(host);
568 sdhci_writel(host, p[MMC_TIMING_MMC_HS400 + 1],
631 struct sdhci_host *host = mmc_priv(mmc);
632 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
644 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
646 dll_cfg = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_CFG);
648 sdhci_writel(host, dll_cfg, SDHCI_SPRD_REG_32_DLL_CFG);
661 sdhci_writel(host, dll_dly, SDHCI_SPRD_REG_32_DLL_DLY);
671 dev_err(mmc_dev(host->mmc), "all tuning phase fail!\n");
685 mmc_hostname(host->mmc), best_clk_sample, p[mmc->ios.timing]);
688 sdhci_writel(host, p[mmc->ios.timing], SDHCI_SPRD_REG_32_DLL_DLY);
734 struct sdhci_host *host;
740 host = sdhci_pltfm_init(pdev, &sdhci_sprd_pdata, sizeof(*sprd_host));
741 if (IS_ERR(host))
742 return PTR_ERR(host);
744 host->dma_mask = DMA_BIT_MASK(64);
745 pdev->dev.dma_mask = &host->dma_mask;
746 host->mmc_host_ops.request = sdhci_sprd_request;
747 host->mmc_host_ops.hs400_enhanced_strobe =
749 host->mmc_host_ops.prepare_sd_hs_tuning =
751 host->mmc_host_ops.execute_sd_hs_tuning =
756 * signal for Spreadtrum SD host controller, since our voltage regulator
758 * the standard SD host controller to change the I/O voltage.
760 host->mmc_host_ops.start_signal_voltage_switch =
763 host->mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
766 ret = mmc_of_parse(host->mmc);
770 if (!mmc_card_is_removable(host->mmc))
771 host->mmc_host_ops.request_atomic = sdhci_sprd_request_atomic;
773 host->always_defer_done = true;
775 sprd_host = TO_SPRD_HOST(host);
828 sdhci_sprd_init_config(host);
829 host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
830 sprd_host->version = ((host->version & SDHCI_VENDOR_VER_MASK) >>
840 sdhci_enable_v4_mode(host);
847 sdhci_read_caps(host);
848 host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
851 ret = mmc_regulator_get_supply(host->mmc);
855 ret = sdhci_setup_host(host);
859 sprd_host->flags = host->flags;
867 ret = mmc_hsq_init(hsq, host->mmc);
871 ret = __sdhci_add_host(host);
881 sdhci_cleanup_host(host);
903 struct sdhci_host *host = platform_get_drvdata(pdev);
904 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
906 sdhci_remove_host(host, 0);
924 struct sdhci_host *host = dev_get_drvdata(dev);
925 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
927 mmc_hsq_suspend(host->mmc);
928 sdhci_runtime_suspend_host(host);
939 struct sdhci_host *host = dev_get_drvdata(dev);
940 struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
955 sdhci_runtime_resume_host(host, 1);
956 mmc_hsq_resume(host->mmc);
989 MODULE_DESCRIPTION("Spreadtrum sdio host controller r11 driver");