Lines Matching refs:ssc
477 u32 ssc;
481 ssc = sdhci_readl(host, SDHCI_GLI_9750_PLLSSC);
484 ssc &= ~SDHCI_GLI_9750_PLLSSC_PPM;
487 ssc |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_PPM, ppm);
488 sdhci_writel(host, ssc, SDHCI_GLI_9750_PLLSSC);
497 /* set pll to 205MHz and ssc */
506 /* set pll to 100MHz and ssc */
515 /* set pll to 50MHz and ssc */
673 u32 ssc;
677 pci_read_config_dword(pdev, PCI_GLI_9755_PLLSSC, &ssc);
680 ssc &= ~PCI_GLI_9755_PLLSSC_PPM;
683 ssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_PPM, ppm);
684 pci_write_config_dword(pdev, PCI_GLI_9755_PLLSSC, ssc);
693 /* set pll to 205MHz and ssc */
702 /* set pll to 100MHz and ssc */
711 /* set pll to 50MHz and ssc */
844 u32 ssc;
849 pci_read_config_dword(pdev, PCIE_GLI_9767_SD_PLL_CTL2, &ssc);
852 ssc &= ~PCIE_GLI_9767_SD_PLL_CTL2_PLLSSC_PPM;
855 ssc |= FIELD_PREP(PCIE_GLI_9767_SD_PLL_CTL2_PLLSSC_PPM, ppm);
856 pci_write_config_dword(pdev, PCIE_GLI_9767_SD_PLL_CTL2, ssc);
887 /* set pll to 205MHz and ssc */