Lines Matching defs:clock
406 pr_info("%s: Tuning timeout, falling back to fixed sampling clock\n",
411 pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",
520 static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
530 if (clock == 0)
533 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
534 if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
537 } else if (clock == 100000000) {
539 } else if (clock == 50000000) {
716 static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
729 if (clock == 0)
732 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
733 if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
736 } else if (clock == 100000000) {
738 } else if (clock == 50000000) {
905 static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)
925 if (clock == 0)
928 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
929 if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
1376 u16 clock;
1381 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
1382 clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
1383 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
1392 u16 clock;
1397 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
1399 clock |= SDHCI_CLOCK_PLL_EN;
1400 clock &= ~SDHCI_CLOCK_INT_STABLE;
1401 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
1404 if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),
1406 pr_err("%s: PLL clock never stabilised.\n",
1411 clock |= SDHCI_CLOCK_CARD_EN;
1412 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);