Lines Matching defs:host

10 #include <linux/mmc/host.h>
91 static void aspeed_sdc_set_slot_capability(struct sdhci_host *host, struct aspeed_sdc *sdc,
102 cap_val = sdhci_readl(host, 0x40 + (cap_reg * 4));
213 aspeed_sdhci_configure_phase(struct sdhci_host *host, unsigned long rate)
220 dev = mmc_dev(host->mmc);
221 sdhci = sdhci_pltfm_priv(sdhci_priv(host));
226 params = &sdhci->phase_map.phase[host->timing];
233 params->in_deg, params->out_deg, rate, host->timing);
236 static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
244 pltfm_host = sdhci_priv(host);
249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
254 if (WARN_ON(clock > host->max_clk))
255 clock = host->max_clk;
283 aspeed_sdhci_configure_phase(host, bus);
285 sdhci_enable_clk(host, clk);
288 static unsigned int aspeed_sdhci_get_max_clock(struct sdhci_host *host)
290 if (host->mmc->f_max)
291 return host->mmc->f_max;
293 return sdhci_pltfm_clk_get_max_clock(host);
296 static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width)
303 pltfm_priv = sdhci_priv(host);
312 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
317 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
320 static u32 aspeed_sdhci_readl(struct sdhci_host *host, int reg)
322 u32 val = readl(host->ioaddr + reg);
325 (host->mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH))
370 struct sdhci_host *host;
381 host = sdhci_pltfm_init(pdev, &aspeed_sdhci_pdata, sizeof(*dev));
382 if (IS_ERR(host))
383 return PTR_ERR(host);
385 pltfm_host = sdhci_priv(host);
414 aspeed_sdc_set_slot_capability(host, dev->parent, ASPEED_SDC_CAP1_1_8V,
419 aspeed_sdc_set_slot_capability(host, dev->parent, ASPEED_SDC_CAP2_SDR104,
433 ret = mmc_of_parse(host->mmc);
438 mmc_of_parse_clk_phase(host->mmc, &dev->phase_map);
440 ret = sdhci_add_host(host);
456 struct sdhci_host *host;
458 host = platform_get_drvdata(pdev);
459 pltfm_host = sdhci_priv(host);
461 sdhci_remove_host(host, 0);