Lines Matching defs:shift
97 #define HIWORD_UPDATE(val, mask, shift) \
98 ((val) << (shift) | (mask) << ((shift) + 16))
105 * @shift: Bit offset within @reg of this field (or -1 if not avail)
110 s16 shift;
216 .baseclkfreq = { .reg = 0xf000, .width = 8, .shift = 8 },
217 .clockmultiplier = { .reg = 0xf02c, .width = 8, .shift = 0},
222 .baseclkfreq = { .reg = 0xa0, .width = 8, .shift = 2 },
223 .clockmultiplier = { .reg = 0, .width = -1, .shift = -1 },
228 .baseclkfreq = { .reg = 0x80, .width = 8, .shift = 2 },
229 .clockmultiplier = { .reg = 0, .width = -1, .shift = -1 },
234 .baseclkfreq = { .reg = 0x0, .width = 8, .shift = 14 },
235 .clockmultiplier = { .reg = 0x4, .width = 8, .shift = 14 },
236 .support64b = { .reg = 0x4, .width = 1, .shift = 24 },
303 * Note that if a field is specified as not available (shift < 0) then
318 s16 shift = fld->shift;
322 * Silently return errors for shift < 0 so caller doesn't have
327 if (shift < 0)
333 shift));
336 GENMASK(shift + width, shift),
337 val << shift);
723 * @degrees: The clock phase shift between 0 - 359.
789 * @degrees: The clock phase shift between 0 - 359.
855 * @degrees: The clock phase shift between 0 - 359.
922 * @degrees: The clock phase shift between 0 - 359.