Lines Matching refs:reset
19 #include <linux/reset.h>
913 * Retuning in HS400 (DDR mode) will fail, just reset the
1018 * configuration on reset. Currently reprogramming the power on
1019 * reset (POR) value in case it might have been modified by
1093 * Retuning in HS400 (DDR mode) will fail, just reset the
1223 /* First of all reset the tuning block */
1545 * SDHCI_HOST_CONTROL2 register. The reset state of that bit is 0
1614 * lost when actual reset and clear/read of status register is
2039 /* Disable cqe reset due to cqe enable signal */
2322 .reset = sdhci_and_cqhci_reset,
2365 struct reset_control *reset;
2368 reset = reset_control_get_optional_exclusive(dev, NULL);
2369 if (IS_ERR(reset))
2370 return dev_err_probe(dev, PTR_ERR(reset),
2373 if (!reset)
2376 ret = reset_control_assert(reset);
2378 reset_control_put(reset);
2389 ret = reset_control_deassert(reset);
2391 reset_control_put(reset);
2396 reset_control_put(reset);
2535 /* Reset the vendor spec register to power on reset state */
2595 * Power on reset state may trigger power irq if previous status of