Lines Matching defs:ctl
89 u32 ctl;
118 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
119 ctl |= F_SDH30_CMD_DAT_DELAY;
120 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
179 u32 ctl;
181 ctl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
182 ctl |= F_SDH30_CRES_O_DN;
183 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2);
184 ctl &= ~F_SDH30_MSEL_O_1_8;
185 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2);
186 ctl &= ~F_SDH30_CRES_O_DN;
187 sdhci_writel(host, ctl, F_SDH30_IO_CONTROL2);
189 ctl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
190 ctl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
192 ctl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
193 sdhci_writew(host, ctl, F_SDH30_AHB_CONFIG);
196 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
197 ctl |= F_SDH30_CMD_DAT_DELAY;
198 sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
214 u16 ctl;
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
219 ctl &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL);