Lines Matching defs:ESDHC_MIX_CTRL
59 #define ESDHC_MIX_CTRL 0x48
482 reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
484 writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
649 val = readl(host->ioaddr + ESDHC_MIX_CTRL);
667 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
710 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
726 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
742 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
749 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
890 new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
892 host->ioaddr + ESDHC_MIX_CTRL);
1055 ctrl = readl(host->ioaddr + ESDHC_MIX_CTRL);
1060 writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);
1063 writel(ctrl, host->ioaddr + ESDHC_MIX_CTRL);
1138 reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
1141 writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
1152 reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
1154 writel(reg, host->ioaddr + ESDHC_MIX_CTRL);
1198 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
1203 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1296 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
1307 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1312 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1326 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
1556 * will also clear the DMAEN/BCEN of register ESDHC_MIX_CTRL.
1715 writel(0x0, host->ioaddr + ESDHC_MIX_CTRL);