Lines Matching defs:host
9 #include <linux/mmc/host.h>
45 static inline void enable_clock_gating(struct sdhci_host *host)
49 reg = sdhci_readl(host, SDHCI_VENDOR);
51 sdhci_writel(host, reg, SDHCI_VENDOR);
54 static void brcmstb_reset(struct sdhci_host *host, u8 mask)
56 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
59 sdhci_and_cqhci_reset(host, mask);
63 enable_clock_gating(host);
68 struct sdhci_host *host = mmc_priv(mmc);
74 reg = readl(host->ioaddr + SDHCI_VENDOR);
79 writel(reg, host->ioaddr + SDHCI_VENDOR);
82 static void sdhci_brcmstb_set_clock(struct sdhci_host *host, unsigned int clock)
86 host->mmc->actual_clock = 0;
88 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
89 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
94 sdhci_enable_clk(host, clk);
97 static void sdhci_brcmstb_set_uhs_signaling(struct sdhci_host *host,
102 dev_dbg(mmc_dev(host->mmc), "%s: Setting UHS signaling for %d timing\n",
104 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
105 /* Select Bus Speed Mode for host */
123 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
133 struct sdhci_host *host = mmc_priv(mmc);
136 reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
138 sdhci_readl(host, SDHCI_BUFFER);
139 reg = sdhci_readl(host, SDHCI_PRESENT_STATE);
189 static u32 sdhci_brcmstb_cqhci_irq(struct sdhci_host *host, u32 intmask)
194 if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
197 cqhci_irq(host->mmc, intmask, cmd_error, data_error);
202 static int sdhci_brcmstb_add_host(struct sdhci_host *host,
210 return sdhci_add_host(host);
212 dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n");
213 host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
214 ret = sdhci_setup_host(host);
218 cq_host = devm_kzalloc(mmc_dev(host->mmc),
225 cq_host->mmio = host->ioaddr + SDHCI_ARASAN_CQE_BASE_ADDR;
228 dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
230 dev_dbg(mmc_dev(host->mmc), "Using 64 bit DMA\n");
234 ret = cqhci_init(cq_host, host->mmc, dma64);
238 ret = __sdhci_add_host(host);
245 sdhci_cleanup_host(host);
257 struct sdhci_host *host;
274 host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
276 if (IS_ERR(host))
277 return PTR_ERR(host);
279 pltfm_host = sdhci_priv(host);
294 res = mmc_of_parse(host->mmc);
303 (host->mmc->caps & MMC_CAP_NONREMOVABLE))
311 (host->mmc->caps2 & MMC_CAP2_HS400_ES))
312 host->mmc_host_ops.hs400_enhanced_strobe = match_priv->hs400es;
319 sdhci_read_caps(host);
321 host->caps &= ~SDHCI_CAN_64BIT;
322 host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
326 host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
347 host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK;
348 host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT);
350 host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
357 res = sdhci_brcmstb_add_host(host, priv);
380 struct sdhci_host *host = dev_get_drvdata(dev);
381 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
390 struct sdhci_host *host = dev_get_drvdata(dev);
391 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);