Lines Matching refs:sdr_set_bits
635 static void sdr_set_bits(void __iomem *reg, u32 bs)
671 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_RST);
674 sdr_set_bits(host->base + MSDC_FIFOCS, MSDC_FIFOCS_CLR);
915 sdr_set_bits(host->base + MSDC_CFG,
918 sdr_set_bits(host->base + MSDC_CFG,
951 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN);
957 sdr_set_bits(host->base + MSDC_INTEN, flags);
1092 sdr_set_bits(host->base + MSDC_INTEN, data_ints_mask);
1308 sdr_set_bits(host->base + MSDC_INTEN, cmd_ints_mask);
1542 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ);
1543 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE);
1701 sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN);
1715 sdr_set_bits(host->base + MSDC_PS, MSDC_PS_CDEN);
1716 sdr_set_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC);
1717 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP);
1735 sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
1754 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL,
1757 sdr_set_bits(host->base + SDC_ADV_CFG0,
1768 sdr_set_bits(host->base + MSDC_PATCH_BIT2,
1773 sdr_set_bits(host->base + MSDC_PATCH_BIT2,
1777 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL,
1781 sdr_set_bits(host->top_base + EMMC_TOP_CMD,
1784 sdr_set_bits(host->base + tune_reg,
1791 sdr_set_bits(host->top_base + EMMC_TOP_CONTROL,
1794 sdr_set_bits(host->base + tune_reg,
1804 sdr_set_bits(host->base + SDC_CFG, SDC_CFG_SDIO);
1808 sdr_set_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER);
2049 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2077 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2111 sdr_set_bits(host->base + PAD_CMD_TUNE, BIT(0));
2123 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2175 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2176 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2192 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2193 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2233 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2234 sdr_set_bits(host->base + MSDC_IOCON,
2253 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2254 sdr_set_bits(host->base + MSDC_IOCON,
2336 sdr_set_bits(host->top_base + EMMC50_PAD_DS_TUNE,
2342 sdr_set_bits(host->base + PAD_DS_TUNE, PAD_DS_TUNE_DLY_SEL);
2394 sdr_set_bits(host->base + EMMC_IOCON, 1);
2446 sdr_set_bits(host->base + CQHCI_SETTING, CQHCI_RD_CMD_WND_SEL);
2447 sdr_set_bits(host->base + CQHCI_SETTING, CQHCI_WR_CMD_WND_SEL);
2499 sdr_set_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL);