Lines Matching defs:sdr_set_field
651 static void sdr_set_field(void __iomem *reg, u32 field, u32 val)
757 sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1);
763 sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT,
827 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,
836 sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,
941 sdr_set_field(host->base + MSDC_CFG,
945 sdr_set_field(host->base + MSDC_CFG,
991 sdr_set_field(host->base + tune_reg,
1093 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1);
1415 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,
1713 sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE,
1731 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
1733 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
1738 sdr_set_field(host->base + MSDC_PATCH_BIT1,
1750 sdr_set_field(host->base + MSDC_PATCH_BIT2,
1760 sdr_set_field(host->base + MSDC_PATCH_BIT2,
1762 sdr_set_field(host->base + MSDC_PATCH_BIT2,
1812 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);
1988 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY,
1991 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY,
2000 sdr_set_field(host->top_base + EMMC_TOP_CONTROL,
2003 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY,
2021 sdr_set_field(host->base + tune_reg,
2086 sdr_set_field(host->base + tune_reg,
2094 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY,
2112 sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2);
2116 sdr_set_field(host->base + MSDC_PAD_TUNE,
2125 sdr_set_field(host->base + PAD_CMD_TUNE,
2143 sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3,
2159 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
2214 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,
2322 sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);
2339 sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,
2344 sdr_set_field(host->base + PAD_DS_TUNE,
2351 sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,
2354 sdr_set_field(host->base + PAD_DS_TUNE,
2370 sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,
2373 sdr_set_field(host->base + PAD_DS_TUNE,
2434 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1);
2435 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1);
2436 sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1);
2442 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0);
2443 sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0);
2444 sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0);
2448 sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4);
2523 sdr_set_field(host->base + MSDC_DMA_CTRL,