Lines Matching defs:sdr_clr_bits
643 static void sdr_clr_bits(void __iomem *reg, u32 bs)
884 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN);
889 sdr_clr_bits(host->base + MSDC_INTEN, flags);
891 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_HS400_CK_MODE);
893 sdr_clr_bits(host->base + MSDC_CFG,
937 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_CKPDN);
1069 sdr_clr_bits(host->base + MSDC_CFG, MSDC_CFG_PIO);
1211 sdr_clr_bits(host->base + MSDC_INTEN, cmd_ints_mask);
1428 sdr_clr_bits(host->base + MSDC_INTEN, data_ints_mask);
1547 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ);
1548 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE);
1719 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP);
1720 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN);
1721 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_CDSC);
1740 sdr_clr_bits(host->base + SDC_FIFO_CFG,
1742 sdr_clr_bits(host->base + SDC_FIFO_CFG,
1747 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, BIT(7));
1766 sdr_clr_bits(host->base + MSDC_PATCH_BIT2,
1779 sdr_clr_bits(host->top_base + EMMC_TOP_CONTROL,
1799 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIO);
1800 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INTEN_SDIOIRQ);
1801 sdr_clr_bits(host->base + SDC_ADV_CFG0, SDC_DAT1_IRQ_TRIGGER);
1807 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_SDIOIDE);
1838 sdr_clr_bits(host->base + MSDC_PS, MSDC_PS_CDEN);
1839 sdr_clr_bits(host->base + SDC_CFG, SDC_CFG_INSWKUP);
2025 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2074 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2121 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2161 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2162 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2188 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2189 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2217 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2218 sdr_clr_bits(host->base + MSDC_IOCON,
2248 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2249 sdr_clr_bits(host->base + MSDC_IOCON,
2275 sdr_clr_bits(host->base + MSDC_IOCON,
2320 sdr_clr_bits(host->base + MSDC_PATCH_BIT2, MSDC_PATCH_BIT2_CFGCRCSTS);
2396 sdr_clr_bits(host->base + EMMC_IOCON, 1);
2438 sdr_clr_bits(host->base + CQHCI_SETTING, CQHCI_RD_CMD_WND_SEL);
2439 sdr_clr_bits(host->base + CQHCI_SETTING, CQHCI_WR_CMD_WND_SEL);
2440 sdr_clr_bits(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT);
2515 sdr_clr_bits(host->base + MSDC_INTEN, MSDC_INT_CMDQ);
2517 sdr_clr_bits(host->base + MSDC_PATCH_BIT1, MSDC_PB1_BUSY_CHECK_SEL);