Lines Matching defs:MSDC_IOCON
54 #define MSDC_IOCON 0x04
116 /* MSDC_IOCON mask */
964 writel(host->def_tune_para.iocon, host->base + MSDC_IOCON);
975 writel(host->saved_tune_para.iocon, host->base + MSDC_IOCON);
1730 writel(0, host->base + MSDC_IOCON);
1731 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);
1814 host->def_tune_para.iocon = readl(host->base + MSDC_IOCON);
1815 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON);
2025 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2049 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2074 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2077 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2121 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2123 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2161 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2162 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2175 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2176 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2188 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2189 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2192 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_DSPL);
2193 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_W_DSPL);
2217 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2218 sdr_clr_bits(host->base + MSDC_IOCON,
2233 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2234 sdr_set_bits(host->base + MSDC_IOCON,
2248 sdr_clr_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2249 sdr_clr_bits(host->base + MSDC_IOCON,
2253 sdr_set_bits(host->base + MSDC_IOCON, MSDC_IOCON_RSPL);
2254 sdr_set_bits(host->base + MSDC_IOCON,
2275 sdr_clr_bits(host->base + MSDC_IOCON,
2297 host->saved_tune_para.iocon = readl(host->base + MSDC_IOCON);
2919 host->save_para.iocon = readl(host->base + MSDC_IOCON);
2947 writel(host->save_para.iocon, host->base + MSDC_IOCON);