Lines Matching defs:host
3 * Amlogic Meson6/Meson8/Meson8b/Meson8m2 SDHC MMC host controller driver.
21 #include <linux/mmc/host.h>
70 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
72 regmap_write(host->regmap, MESON_SDHC_SRST, MESON_SDHC_SRST_MAIN_CTRL |
78 regmap_write(host->regmap, MESON_SDHC_SRST, 0);
84 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
87 regmap_read(host->regmap, MESON_SDHC_STAT, &stat);
92 regmap_write(host->regmap, MESON_SDHC_SRST, MESON_SDHC_SRST_RXFIFO |
96 regmap_read(host->regmap, MESON_SDHC_STAT, &stat);
99 dev_warn(mmc_dev(host->mmc),
107 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
111 ret = regmap_read_poll_timeout(host->regmap, MESON_SDHC_STAT, stat,
118 host->cmd->opcode);
122 ret = regmap_read_poll_timeout(host->regmap, MESON_SDHC_ESTA, esta,
129 host->cmd->opcode);
137 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
142 host->cmd = cmd;
169 if (host->platform->hardware_flush_all_cmds ||
193 regmap_update_bits(host->regmap, MESON_SDHC_MISC,
215 regmap_write(host->regmap, MESON_SDHC_ICTL, ictl);
216 regmap_write(host->regmap, MESON_SDHC_ISTA, MESON_SDHC_ISTA_ALL_IRQS);
218 regmap_write(host->regmap, MESON_SDHC_ARGU, cmd->arg);
220 regmap_update_bits(host->regmap, MESON_SDHC_CTRL,
225 regmap_write(host->regmap, MESON_SDHC_ADDR,
231 host->platform->set_pdma(mmc);
233 if (host->platform->wait_before_send)
234 host->platform->wait_before_send(mmc);
236 regmap_write(host->regmap, MESON_SDHC_SEND, send);
241 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
243 if (!host->bulk_clks_enabled)
246 clk_bulk_disable_unprepare(MESON_SDHC_NUM_BULK_CLKS, host->bulk_clks);
248 host->bulk_clks_enabled = false;
253 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
256 if (host->bulk_clks_enabled)
260 host->bulk_clks);
264 host->bulk_clks_enabled = true;
271 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
278 ret = clk_set_rate(host->sd_clk, ios->clock);
282 ios->clock, host->error);
290 mmc->actual_clock = clk_get_rate(host->sd_clk);
296 regmap_read(host->regmap, MESON_SDHC_CLKC, &val);
298 regmap_update_bits(host->regmap, MESON_SDHC_CLK2,
311 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
321 host->error = mmc_regulator_set_ocr(mmc,
324 if (host->error)
334 host->error = meson_mx_sdhc_set_clk(mmc, ios);
335 if (host->error)
340 regmap_update_bits(host->regmap, MESON_SDHC_CTRL,
346 regmap_update_bits(host->regmap, MESON_SDHC_CTRL,
352 regmap_update_bits(host->regmap, MESON_SDHC_CTRL,
360 host->error = -EINVAL;
385 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
388 if (!host->error)
389 host->error = meson_mx_sdhc_map_dma(mmc, mrq);
391 if (host->error) {
392 cmd->error = host->error;
397 host->mrq = mrq;
404 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
407 regmap_read(host->regmap, MESON_SDHC_STAT, &stat);
428 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
437 regmap_read(host->regmap, MESON_SDHC_CLK2, &val);
440 regmap_read(host->regmap, MESON_SDHC_CLKC, &val);
444 regmap_update_bits(host->regmap, MESON_SDHC_CLK2,
484 regmap_update_bits(host->regmap, MESON_SDHC_CLK2,
507 static void meson_mx_sdhc_request_done(struct meson_mx_sdhc_host *host)
509 struct mmc_request *mrq = host->mrq;
510 struct mmc_host *mmc = host->mmc;
513 regmap_update_bits(host->regmap, MESON_SDHC_ICTL,
515 regmap_update_bits(host->regmap, MESON_SDHC_ISTA,
518 host->mrq = NULL;
519 host->cmd = NULL;
524 static u32 meson_mx_sdhc_read_response(struct meson_mx_sdhc_host *host, u8 idx)
528 regmap_update_bits(host->regmap, MESON_SDHC_PDMA,
531 regmap_update_bits(host->regmap, MESON_SDHC_PDMA,
535 regmap_read(host->regmap, MESON_SDHC_ARGU, &val);
542 struct meson_mx_sdhc_host *host = data;
543 struct mmc_command *cmd = host->cmd;
546 regmap_read(host->regmap, MESON_SDHC_ICTL, &ictl);
547 regmap_read(host->regmap, MESON_SDHC_ISTA, &ista);
568 dev_dbg(mmc_dev(host->mmc), "CMD%d error, ISTA: 0x%08x\n",
576 struct meson_mx_sdhc_host *host = irq_data;
580 cmd = host->cmd;
585 if (!host->platform->hardware_flush_all_cmds &&
587 meson_mx_sdhc_wait_cmd_ready(host->mmc);
599 regmap_update_bits(host->regmap, MESON_SDHC_PDMA, val,
603 dma_unmap_sg(mmc_dev(host->mmc), cmd->data->sg,
609 meson_mx_sdhc_wait_cmd_ready(host->mmc);
612 cmd->resp[0] = meson_mx_sdhc_read_response(host, 4);
613 cmd->resp[1] = meson_mx_sdhc_read_response(host, 3);
614 cmd->resp[2] = meson_mx_sdhc_read_response(host, 2);
615 cmd->resp[3] = meson_mx_sdhc_read_response(host, 1);
617 cmd->resp[0] = meson_mx_sdhc_read_response(host, 0);
621 meson_mx_sdhc_hw_reset(host->mmc);
629 meson_mx_sdhc_clear_fifo(host->mmc);
631 meson_mx_sdhc_request_done(host);
638 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
640 regmap_write(host->regmap, MESON_SDHC_MISC,
645 regmap_write(host->regmap, MESON_SDHC_ENHC,
654 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
656 if (host->cmd->data->flags & MMC_DATA_WRITE)
657 regmap_update_bits(host->regmap, MESON_SDHC_PDMA,
665 regmap_update_bits(host->regmap, MESON_SDHC_PDMA,
672 if (host->cmd->data->flags & MMC_DATA_WRITE)
673 regmap_update_bits(host->regmap, MESON_SDHC_PDMA,
680 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
684 ret = regmap_read_poll_timeout(host->regmap, MESON_SDHC_ESTA, val,
692 if (host->cmd->data && host->cmd->data->flags & MMC_DATA_WRITE) {
693 ret = regmap_read_poll_timeout(host->regmap, MESON_SDHC_STAT,
705 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
707 regmap_write(host->regmap, MESON_SDHC_MISC,
712 regmap_write(host->regmap, MESON_SDHC_ENHC,
721 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
723 regmap_update_bits(host->regmap, MESON_SDHC_PDMA,
729 struct meson_mx_sdhc_host *host = mmc_priv(mmc);
733 regmap_write(host->regmap, MESON_SDHC_CTRL,
743 regmap_write(host->regmap, MESON_SDHC_CLKC, MESON_SDHC_CLKC_CLK_DIV);
745 regmap_write(host->regmap, MESON_SDHC_CLK2,
748 regmap_write(host->regmap, MESON_SDHC_PDMA,
756 host->platform->init_hw(mmc);
759 regmap_write(host->regmap, MESON_SDHC_ICTL, 0);
760 regmap_write(host->regmap, MESON_SDHC_ISTA, MESON_SDHC_ISTA_ALL_IRQS);
771 struct meson_mx_sdhc_host *host;
776 mmc = mmc_alloc_host(sizeof(*host), dev);
786 host = mmc_priv(mmc);
787 host->mmc = mmc;
789 platform_set_drvdata(pdev, host);
791 host->platform = device_get_match_data(dev);
792 if (!host->platform)
799 host->regmap = devm_regmap_init_mmio(dev, base,
801 if (IS_ERR(host->regmap))
802 return PTR_ERR(host->regmap);
804 host->pclk = devm_clk_get(dev, "pclk");
805 if (IS_ERR(host->pclk))
806 return PTR_ERR(host->pclk);
809 ret = clk_prepare_enable(host->pclk);
817 ret = meson_mx_sdhc_register_clkc(dev, base, host->bulk_clks);
821 host->sd_clk = host->bulk_clks[1].clk;
833 mmc->f_min = clk_round_rate(host->sd_clk, 1);
834 mmc->f_max = clk_round_rate(host->sd_clk, ULONG_MAX);
852 NULL, host);
863 clk_disable_unprepare(host->pclk);
869 struct meson_mx_sdhc_host *host = platform_get_drvdata(pdev);
871 mmc_remove_host(host->mmc);
873 meson_mx_sdhc_disable_clks(host->mmc);
875 clk_disable_unprepare(host->pclk);