Lines Matching refs:reset
192 static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset)
197 ctrl |= reset;
202 !(ctrl & reset),
205 "Timeout resetting block (ctrl reset %#x)\n",
206 ctrl & reset);
452 /* Software reset of DMA */
461 /* Disable and reset the IDMAC interface */
740 /* Make sure to reset DMA in case we did PIO before this */
1511 /* Keep track so we don't reset again */
1621 int reset;
1631 * According to eMMC spec, card reset procedure:
1636 reset = mci_readl(host, RST_N);
1637 reset &= ~(SDMMC_RST_HWACTIVE << slot->id);
1638 mci_writel(host, RST_N, reset);
1640 reset |= SDMMC_RST_HWACTIVE << slot->id;
1641 mci_writel(host, RST_N, reset);
1781 /* when using DMA next we reset the fifo again */
1785 /* if the controller reset bit did clear, then set clock regs */
1788 "%s: fifo/dma reset bits didn't clear but ciu was reset, doing clock update\n",
1801 /* After a CTRL reset we need to have CIU set clock registers */
2230 * never get one since we just reset everything;
3224 /* find reset controller when exist */
3225 pdata->rstc = devm_reset_control_get_optional_exclusive(dev, "reset");