Lines Matching refs:clksel
143 u32 clksel;
148 clksel = mci_readl(host, CLKSEL64);
150 clksel = mci_readl(host, CLKSEL);
152 clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing;
157 mci_writel(host, CLKSEL64, clksel);
159 mci_writel(host, CLKSEL, clksel);
168 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot)
217 u32 clksel;
227 clksel = mci_readl(host, CLKSEL64);
229 clksel = mci_readl(host, CLKSEL);
231 if (clksel & SDMMC_CLKSEL_WAKEUP_INT) {
235 mci_writel(host, CLKSEL64, clksel);
237 mci_writel(host, CLKSEL, clksel);
315 u32 timing = ios->timing, clksel;
320 clksel = SDMMC_CLKSEL_UP_SAMPLE(
325 clksel = priv->ddr_timing;
332 clksel = (priv->sdr_timing & 0xfff8ffff) |
336 clksel = (priv->ddr_timing & 0xfff8ffff) |
340 clksel = priv->sdr_timing;
344 dw_mci_exynos_set_clksel_timing(host, clksel);
421 u32 clksel;
427 clksel = mci_readl(host, CLKSEL64);
429 clksel = mci_readl(host, CLKSEL);
430 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
434 mci_writel(host, CLKSEL64, clksel);
436 mci_writel(host, CLKSEL, clksel);
442 u32 clksel;
448 clksel = mci_readl(host, CLKSEL64);
450 clksel = mci_readl(host, CLKSEL);
452 sample = (clksel + 1) & 0x7;
453 clksel = SDMMC_CLKSEL_UP_SAMPLE(clksel, sample);
458 mci_writel(host, CLKSEL64, clksel);
460 mci_writel(host, CLKSEL, clksel);