Lines Matching defs:DAVINCI_MMCCTL
32 #define DAVINCI_MMCCTL 0x00 /* Control Register */
63 /* DAVINCI_MMCCTL definitions */
710 writel((readl(host->base + DAVINCI_MMCCTL) &
712 host->base + DAVINCI_MMCCTL);
717 writel((readl(host->base + DAVINCI_MMCCTL) &
719 host->base + DAVINCI_MMCCTL);
721 writel(readl(host->base + DAVINCI_MMCCTL) |
723 host->base + DAVINCI_MMCCTL);
728 writel(readl(host->base + DAVINCI_MMCCTL) &
730 host->base + DAVINCI_MMCCTL);
732 writel(readl(host->base + DAVINCI_MMCCTL) &
734 host->base + DAVINCI_MMCCTL);
831 temp = readl(host->base + DAVINCI_MMCCTL);
837 writel(temp, host->base + DAVINCI_MMCCTL);