Lines Matching defs:cfg
35 const union cqhci_crypto_cfg_entry *cfg,
38 u32 slot_offset = cq_host->crypto_cfg_register + slot * sizeof(*cfg);
42 return cq_host->ops->program_key(cq_host, cfg, slot);
45 cqhci_writel(cq_host, 0, slot_offset + 16 * sizeof(cfg->reg_val[0]));
49 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[i]),
50 slot_offset + i * sizeof(cfg->reg_val[0]));
53 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[17]),
54 slot_offset + 17 * sizeof(cfg->reg_val[0]));
56 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[16]),
57 slot_offset + 16 * sizeof(cfg->reg_val[0]));
74 union cqhci_crypto_cfg_entry cfg = {};
89 cfg.data_unit_size = data_unit_mask;
90 cfg.crypto_cap_idx = cap_idx;
91 cfg.config_enable = CQHCI_CRYPTO_CONFIGURATION_ENABLE;
95 memcpy(cfg.crypto_key, key->raw, key->size/2);
96 memcpy(cfg.crypto_key + CQHCI_CRYPTO_KEY_MAX_SIZE/2,
99 memcpy(cfg.crypto_key, key->raw, key->size);
102 err = cqhci_crypto_program_key(cq_host, &cfg, slot);
104 memzero_explicit(&cfg, sizeof(cfg));
111 * Clear the crypto cfg on the device. Clearing CFGE
112 * might not be sufficient, so just clear the entire cfg.
114 union cqhci_crypto_cfg_entry cfg = {};
116 return cqhci_crypto_program_key(cq_host, &cfg, slot);