Lines Matching refs:dev
146 * @dev: the device structure
153 * Locking: called under "dev->device_lock" lock
157 static bool mei_txe_aliveness_set(struct mei_device *dev, u32 req)
160 struct mei_txe_hw *hw = to_txe_hw(dev);
163 dev_dbg(dev->dev, "Aliveness current=%d request=%d\n",
166 dev->pg_event = MEI_PG_EVENT_WAIT;
176 * @dev: the device structure
183 static u32 mei_txe_aliveness_req_get(struct mei_device *dev)
185 struct mei_txe_hw *hw = to_txe_hw(dev);
195 * @dev: the device structure
200 static u32 mei_txe_aliveness_get(struct mei_device *dev)
202 struct mei_txe_hw *hw = to_txe_hw(dev);
212 * @dev: the device structure
219 static int mei_txe_aliveness_poll(struct mei_device *dev, u32 expected)
221 struct mei_txe_hw *hw = to_txe_hw(dev);
227 hw->aliveness = mei_txe_aliveness_get(dev);
229 dev->pg_event = MEI_PG_EVENT_IDLE;
230 dev_dbg(dev->dev, "aliveness settled after %lld usecs\n",
237 dev->pg_event = MEI_PG_EVENT_IDLE;
238 dev_err(dev->dev, "aliveness timed out\n");
245 * @dev: the device structure
252 static int mei_txe_aliveness_wait(struct mei_device *dev, u32 expected)
254 struct mei_txe_hw *hw = to_txe_hw(dev);
260 hw->aliveness = mei_txe_aliveness_get(dev);
264 mutex_unlock(&dev->device_lock);
266 dev->pg_event == MEI_PG_EVENT_RECEIVED, timeout);
267 mutex_lock(&dev->device_lock);
269 hw->aliveness = mei_txe_aliveness_get(dev);
273 dev_warn(dev->dev, "aliveness timed out = %ld aliveness = %d event = %d\n",
274 err, hw->aliveness, dev->pg_event);
276 dev_dbg(dev->dev, "aliveness settled after = %d msec aliveness = %d event = %d\n",
278 hw->aliveness, dev->pg_event);
280 dev->pg_event = MEI_PG_EVENT_IDLE;
287 * @dev: the device structure
292 int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req)
294 if (mei_txe_aliveness_set(dev, req))
295 return mei_txe_aliveness_wait(dev, req);
302 * @dev: the device structure
306 static bool mei_txe_pg_in_transition(struct mei_device *dev)
308 return dev->pg_event == MEI_PG_EVENT_WAIT;
314 * @dev: the device structure
318 static bool mei_txe_pg_is_enabled(struct mei_device *dev)
327 * @dev: the device structure
331 static inline enum mei_pg_state mei_txe_pg_state(struct mei_device *dev)
333 struct mei_txe_hw *hw = to_txe_hw(dev);
341 * @dev: the device structure
343 static void mei_txe_input_ready_interrupt_enable(struct mei_device *dev)
345 struct mei_txe_hw *hw = to_txe_hw(dev);
381 * @dev: the device structure
385 static bool mei_txe_is_input_ready(struct mei_device *dev)
387 struct mei_txe_hw *hw = to_txe_hw(dev);
397 * @dev: the device structure
399 static inline void mei_txe_intr_clear(struct mei_device *dev)
401 struct mei_txe_hw *hw = to_txe_hw(dev);
412 * @dev: the device structure
414 static void mei_txe_intr_disable(struct mei_device *dev)
416 struct mei_txe_hw *hw = to_txe_hw(dev);
424 * @dev: the device structure
426 static void mei_txe_intr_enable(struct mei_device *dev)
428 struct mei_txe_hw *hw = to_txe_hw(dev);
437 * @dev: the device structure
439 static void mei_txe_synchronize_irq(struct mei_device *dev)
441 struct pci_dev *pdev = to_pci_dev(dev->dev);
450 * @dev: the device structure
457 static bool mei_txe_pending_interrupts(struct mei_device *dev)
460 struct mei_txe_hw *hw = to_txe_hw(dev);
467 dev_dbg(dev->dev,
481 * @dev: the device structure
485 static void mei_txe_input_payload_write(struct mei_device *dev,
488 struct mei_txe_hw *hw = to_txe_hw(dev);
498 * @dev: the device structure
503 static u32 mei_txe_out_data_read(const struct mei_device *dev,
506 struct mei_txe_hw *hw = to_txe_hw(dev);
517 * @dev: the device structure
519 static void mei_txe_readiness_set_host_rdy(struct mei_device *dev)
521 struct mei_txe_hw *hw = to_txe_hw(dev);
531 * @dev: the device structure
533 static void mei_txe_readiness_clear(struct mei_device *dev)
535 struct mei_txe_hw *hw = to_txe_hw(dev);
544 * @dev: the device structure
548 static u32 mei_txe_readiness_get(struct mei_device *dev)
550 struct mei_txe_hw *hw = to_txe_hw(dev);
572 * @dev: the device structure
576 static bool mei_txe_hw_is_ready(struct mei_device *dev)
578 u32 readiness = mei_txe_readiness_get(dev);
586 * @dev: the device structure
590 static inline bool mei_txe_host_is_ready(struct mei_device *dev)
592 struct mei_txe_hw *hw = to_txe_hw(dev);
601 * @dev: the device structure
605 static int mei_txe_readiness_wait(struct mei_device *dev)
607 if (mei_txe_hw_is_ready(dev))
610 mutex_unlock(&dev->device_lock);
611 wait_event_timeout(dev->wait_hw_ready, dev->recvd_hw_ready,
613 mutex_lock(&dev->device_lock);
614 if (!dev->recvd_hw_ready) {
615 dev_err(dev->dev, "wait for readiness failed\n");
619 dev->recvd_hw_ready = false;
632 * @dev: mei device
637 static int mei_txe_fw_status(struct mei_device *dev,
641 struct pci_dev *pdev = to_pci_dev(dev->dev);
652 trace_mei_pci_cfg_read(dev->dev, "PCI_CFG_HSF_X",
665 * @dev: the device structure
672 static int mei_txe_hw_config(struct mei_device *dev)
675 struct mei_txe_hw *hw = to_txe_hw(dev);
677 hw->aliveness = mei_txe_aliveness_get(dev);
678 hw->readiness = mei_txe_readiness_get(dev);
680 dev_dbg(dev->dev, "aliveness_resp = 0x%08x, readiness = 0x%08x.\n",
689 * @dev: the device structure
697 static int mei_txe_write(struct mei_device *dev,
701 struct mei_txe_hw *hw = to_txe_hw(dev);
711 dev_dbg(dev->dev, MEI_HDR_FMT, MEI_HDR_PRM((struct mei_msg_hdr *)hdr));
721 mei_txe_input_ready_interrupt_enable(dev);
723 if (!mei_txe_is_input_ready(dev)) {
726 mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ);
727 dev_err(dev->dev, "Input is not ready %s\n", fw_sts_str);
733 mei_txe_input_payload_write(dev, i, reg_buf[i]);
737 mei_txe_input_payload_write(dev, i + j, reg_buf[j]);
744 mei_txe_input_payload_write(dev, i + j, reg);
759 * @dev: the device structure
763 static u32 mei_txe_hbuf_depth(const struct mei_device *dev)
771 * @dev: the device structure
775 static int mei_txe_hbuf_empty_slots(struct mei_device *dev)
777 struct mei_txe_hw *hw = to_txe_hw(dev);
785 * @dev: the device structure
789 static int mei_txe_count_full_read_slots(struct mei_device *dev)
798 * @dev: the device structure
803 static u32 mei_txe_read_hdr(const struct mei_device *dev)
805 return mei_txe_out_data_read(dev, 0);
810 * @dev: the device structure
816 static int mei_txe_read(struct mei_device *dev,
820 struct mei_txe_hw *hw = to_txe_hw(dev);
831 dev_dbg(dev->dev, "buffer-length = %lu buf[0]0x%08X\n",
832 len, mei_txe_out_data_read(dev, 0));
836 reg = mei_txe_out_data_read(dev, i + 1);
837 dev_dbg(dev->dev, "buf[%d] = 0x%08X\n", i, reg);
842 reg = mei_txe_out_data_read(dev, i + 1);
853 * @dev: the device structure
858 static int mei_txe_hw_reset(struct mei_device *dev, bool intr_enable)
860 struct mei_txe_hw *hw = to_txe_hw(dev);
869 aliveness_req = mei_txe_aliveness_req_get(dev);
870 hw->aliveness = mei_txe_aliveness_get(dev);
873 mei_txe_intr_disable(dev);
881 if (mei_txe_aliveness_poll(dev, aliveness_req) < 0) {
882 dev_err(dev->dev, "wait for aliveness settle failed ... bailing out\n");
890 mei_txe_aliveness_set(dev, 0);
891 if (mei_txe_aliveness_poll(dev, 0) < 0) {
892 dev_err(dev->dev, "wait for aliveness failed ... bailing out\n");
900 mei_txe_readiness_clear(dev);
908 * @dev: the device structure
912 static int mei_txe_hw_start(struct mei_device *dev)
914 struct mei_txe_hw *hw = to_txe_hw(dev);
920 mei_txe_intr_enable(dev);
922 ret = mei_txe_readiness_wait(dev);
924 dev_err(dev->dev, "waiting for readiness failed\n");
938 ret = mei_txe_aliveness_set_sync(dev, 1);
940 dev_err(dev->dev, "wait for aliveness failed ... bailing out\n");
944 pm_runtime_set_active(dev->dev);
949 mei_txe_input_ready_interrupt_enable(dev);
957 mei_txe_readiness_set_host_rdy(dev);
966 * @dev: the device structure
971 static bool mei_txe_check_and_ack_intrs(struct mei_device *dev, bool do_ack)
973 struct mei_txe_hw *hw = to_txe_hw(dev);
988 aliveness = mei_txe_aliveness_get(dev);
1004 mei_txe_intr_disable(dev);
1028 struct mei_device *dev = dev_id;
1030 if (mei_txe_check_and_ack_intrs(dev, true))
1046 struct mei_device *dev = (struct mei_device *) dev_id;
1047 struct mei_txe_hw *hw = to_txe_hw(dev);
1052 dev_dbg(dev->dev, "irq thread: Interrupt Registers HHISR|HISR|SEC=%02X|%04X|%02X\n",
1059 mutex_lock(&dev->device_lock);
1062 if (pci_dev_msi_enabled(to_pci_dev(dev->dev)))
1063 mei_txe_check_and_ack_intrs(dev, true);
1066 mei_txe_pending_interrupts(dev);
1068 hw->aliveness = mei_txe_aliveness_get(dev);
1069 hw->readiness = mei_txe_readiness_get(dev);
1076 dev_dbg(dev->dev, "Readiness Interrupt was received...\n");
1080 dev_dbg(dev->dev, "we need to start the dev.\n");
1081 dev->recvd_hw_ready = true;
1083 dev->recvd_hw_ready = false;
1084 if (dev->dev_state != MEI_DEV_RESETTING) {
1086 dev_warn(dev->dev, "FW not ready: resetting.\n");
1087 schedule_work(&dev->reset_work);
1092 wake_up(&dev->wait_hw_ready);
1103 dev_dbg(dev->dev,
1105 dev->pg_event = MEI_PG_EVENT_RECEIVED;
1114 slots = mei_count_full_read_slots(dev);
1117 rets = mei_irq_read_handler(dev, &cmpl_list, &slots);
1119 (dev->dev_state != MEI_DEV_RESETTING &&
1120 dev->dev_state != MEI_DEV_POWER_DOWN)) {
1121 dev_err(dev->dev,
1124 schedule_work(&dev->reset_work);
1130 dev->hbuf_is_ready = true;
1134 if (hw->aliveness && dev->hbuf_is_ready) {
1136 dev->hbuf_is_ready = mei_hbuf_is_ready(dev);
1137 rets = mei_irq_write_handler(dev, &cmpl_list);
1139 dev_err(dev->dev, "mei_irq_write_handler ret = %d.\n",
1141 dev->hbuf_is_ready = mei_hbuf_is_ready(dev);
1144 mei_irq_compl_handler(dev, &cmpl_list);
1147 dev_dbg(dev->dev, "interrupt thread end ret = %d\n", rets);
1149 mutex_unlock(&dev->device_lock);
1151 mei_enable_interrupts(dev);
1197 struct mei_device *dev;
1200 dev = devm_kzalloc(&pdev->dev, sizeof(*dev) + sizeof(*hw), GFP_KERNEL);
1201 if (!dev)
1204 mei_device_init(dev, &pdev->dev, false, &mei_txe_hw_ops);
1206 hw = to_txe_hw(dev);
1210 return dev;
1216 * @dev: the device structure
1222 int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range)
1224 struct mei_txe_hw *hw = to_txe_hw(dev);
1252 dev_dbg(dev->dev, "SATT2: SAP_SIZE_OFFSET=0x%08X, BRG_BA_LSB_OFFSET=0x%08X, CTRL_OFFSET=0x%08X\n",