Lines Matching refs:hcsr
141 u32 hcsr;
143 hcsr = mei_hcsr_read(dev) | H_IG;
144 mei_hcsr_set(dev, hcsr);
243 u32 hcsr, reg;
249 hcsr = mei_hcsr_read(dev);
250 hw->hbuf_depth = (hcsr & H_CBD) >> 24;
283 static inline u32 me_intr_src(u32 hcsr)
285 return hcsr & H_CSR_IS_MASK;
290 * using supplied hcsr register value.
293 * @hcsr: supplied hcsr register value
295 static inline void me_intr_disable(struct mei_device *dev, u32 hcsr)
297 hcsr &= ~H_CSR_IE_MASK;
298 mei_hcsr_set(dev, hcsr);
305 * @hcsr: supplied hcsr register value
307 static inline void me_intr_clear(struct mei_device *dev, u32 hcsr)
309 if (me_intr_src(hcsr))
310 mei_hcsr_write(dev, hcsr);
320 u32 hcsr = mei_hcsr_read(dev);
322 me_intr_clear(dev, hcsr);
331 u32 hcsr;
336 hcsr = mei_hcsr_read(dev) | H_CSR_IE_MASK;
337 mei_hcsr_set(dev, hcsr);
347 u32 hcsr = mei_hcsr_read(dev);
349 me_intr_disable(dev, hcsr);
374 u32 hcsr = mei_hcsr_read(dev);
376 hcsr |= H_IG;
377 hcsr &= ~H_RST;
378 mei_hcsr_set(dev, hcsr);
388 u32 hcsr = mei_hcsr_read(dev);
391 hcsr |= H_CSR_IE_MASK;
393 hcsr |= H_IG | H_RDY;
394 mei_hcsr_set(dev, hcsr);
405 u32 hcsr = mei_hcsr_read(dev);
407 return (hcsr & H_RDY) == H_RDY;
513 u32 hcsr;
516 hcsr = mei_hcsr_read(dev);
518 read_ptr = (char) ((hcsr & H_CBRP) >> 8);
519 write_ptr = (char) ((hcsr & H_CBWP) >> 16);
1190 u32 hcsr;
1205 hcsr = mei_hcsr_read(dev);
1211 if ((hcsr & H_RST) == H_RST) {
1212 dev_warn(dev->dev, "H_RST is set = 0x%08X", hcsr);
1213 hcsr &= ~H_RST;
1214 mei_hcsr_set(dev, hcsr);
1215 hcsr = mei_hcsr_read(dev);
1218 hcsr |= H_RST | H_IG | H_CSR_IS_MASK;
1221 hcsr &= ~H_CSR_IE_MASK;
1224 mei_hcsr_write(dev, hcsr);
1230 hcsr = mei_hcsr_read(dev);
1232 if ((hcsr & H_RST) == 0)
1233 dev_warn(dev->dev, "H_RST is not set = 0x%08X", hcsr);
1235 if ((hcsr & H_RDY) == H_RDY)
1236 dev_warn(dev->dev, "H_RDY is not cleared 0x%08X", hcsr);
1260 u32 hcsr;
1262 hcsr = mei_hcsr_read(dev);
1263 if (!me_intr_src(hcsr))
1266 dev_dbg(dev->dev, "interrupt source 0x%08X\n", me_intr_src(hcsr));
1269 me_intr_disable(dev, hcsr);
1289 u32 hcsr;
1296 hcsr = mei_hcsr_read(dev);
1297 me_intr_clear(dev, hcsr);
1316 mei_me_pg_intr(dev, me_intr_src(hcsr));
1404 u32 hcsr;
1413 hcsr = mei_hcsr_read(dev);
1414 if (me_intr_src(hcsr)) {