Lines Matching refs:__dw_regs
73 static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw)
84 burst = readl(&(__dw_regs(dw)->burst_cnt));
88 writel(burst, &(__dw_regs(dw)->burst_cnt));
105 writel(0x0, &(__dw_regs(dw)->status));
108 writel(BURST_REPEAT | BURST_VALUE, &(__dw_regs(dw)->burst_cnt));
111 writel(PATTERN_VALUE, &(__dw_regs(dw)->pattern));
121 writel(control, &(__dw_regs(dw)->control));
129 status = readl(&(__dw_regs(dw)->status));
141 *data = readl(&(__dw_regs(dw)->wr_cnt_msb));
143 *data |= readl(&(__dw_regs(dw)->wr_cnt_lsb));
145 *data = readl(&(__dw_regs(dw)->rd_cnt_msb));
147 *data |= readl(&(__dw_regs(dw)->rd_cnt_lsb));
170 writel(0x0, &(__dw_regs(dw)->perf_control));
173 writel((u32)XPERF_CONTROL_ENABLE, &(__dw_regs(dw)->perf_control));
182 writel(0x0, &(__dw_regs(dw)->perf_control));
185 writel((u32)XPERF_CONTROL_ENABLE, &(__dw_regs(dw)->perf_control));
353 writel(0x0, &(__dw_regs(dw)->RAM_addr));
354 writel(0x0, &(__dw_regs(dw)->RAM_port));
357 writel(lower_32_bits(addr), &(__dw_regs(dw)->addr_lsb));
358 writel(upper_32_bits(addr), &(__dw_regs(dw)->addr_msb));