Lines Matching refs:val
21 u8 val;
23 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
24 return val & IC_VERSION_MASK;
285 u8 mask, val;
297 val = pcr->hw_param.ocp_glitch;
298 rtsx_pci_write_register(pcr, REG_OCPGLITCH, mask, val);
315 u8 val = 0;
317 val = SD_OCP_INT_EN | SD_DETECT_EN;
318 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val);
332 static int rts5260_get_ocpstat(struct rtsx_pcr *pcr, u8 *val)
334 return rtsx_pci_read_register(pcr, REG_OCPSTAT, val);
337 static int rts5260_get_ocpstat2(struct rtsx_pcr *pcr, u8 *val)
339 return rtsx_pci_read_register(pcr, REG_DV3318_OCPSTAT, val);
345 u8 val = 0;
348 val = SD_OCP_INT_CLR | SD_OC_CLR;
350 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val);
536 u8 val = 0;
544 val = option->ltr_l1off_snooze_sspwrgate;
548 val = option->ltr_l1off_sspwrgate;
555 val &= ~L1OFF_MBIAS2_EN_5250;
557 val |= L1OFF_MBIAS2_EN_5250;
560 rtsx_set_l1off_sub(pcr, val);