Lines Matching refs:pcf
20 int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
26 if (WARN_ON(pcf->irq_handler[irq].handler))
29 mutex_lock(&pcf->lock);
30 pcf->irq_handler[irq].handler = handler;
31 pcf->irq_handler[irq].data = data;
32 mutex_unlock(&pcf->lock);
38 int pcf50633_free_irq(struct pcf50633 *pcf, int irq)
43 mutex_lock(&pcf->lock);
44 pcf->irq_handler[irq].handler = NULL;
45 mutex_unlock(&pcf->lock);
51 static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask)
60 pcf50633_reg_set_bit_mask(pcf, reg, bit, mask ? bit : 0);
62 mutex_lock(&pcf->lock);
65 pcf->mask_regs[idx] |= bit;
67 pcf->mask_regs[idx] &= ~bit;
69 mutex_unlock(&pcf->lock);
74 int pcf50633_irq_mask(struct pcf50633 *pcf, int irq)
76 dev_dbg(pcf->dev, "Masking IRQ %d\n", irq);
78 return __pcf50633_irq_mask_set(pcf, irq, 1);
82 int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq)
84 dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq);
86 return __pcf50633_irq_mask_set(pcf, irq, 0);
90 int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq)
97 return pcf->mask_regs[reg] & bits;
101 static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq)
103 if (pcf->irq_handler[irq].handler)
104 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data);
112 struct pcf50633 *pcf = data;
117 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1,
120 dev_err(pcf->dev, "Error reading INT registers\n");
130 pcf50633_reg_write(pcf, PCF50633_REG_OOCSHDWN, 0x04);
135 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
144 chgstat = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
151 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x "
157 if ((pcf_int[0] & PCF50633_INT1_SECOND) && pcf->onkey1s_held) {
158 dev_info(pcf->dev, "ONKEY1S held for %d secs\n",
159 pcf->onkey1s_held);
160 if (pcf->onkey1s_held++ == PCF50633_ONKEY1S_TIMEOUT)
161 if (pcf->pdata->force_shutdown)
162 pcf->pdata->force_shutdown(pcf);
166 dev_info(pcf->dev, "ONKEY1S held\n");
167 pcf->onkey1s_held = 1 ;
170 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M,
174 pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT2M,
178 if ((pcf_int[1] & PCF50633_INT2_ONKEYR) && pcf->onkey1s_held) {
179 pcf->onkey1s_held = 0;
182 if (pcf->mask_regs[0] & PCF50633_INT1_SECOND)
183 pcf50633_reg_set_bit_mask(pcf,
188 if (pcf->mask_regs[1] & PCF50633_INT2_ONKEYR)
189 pcf50633_reg_set_bit_mask(pcf,
196 if (pcf->is_suspended) {
197 pcf->is_suspended = 0;
201 pcf->resume_reason[i] = pcf_int[i] &
202 pcf->pdata->resumers[i];
211 pcf_int[i] &= ~pcf->mask_regs[i];
215 pcf50633_irq_call_handler(pcf, (i * 8) + j);
225 struct pcf50633 *pcf = i2c_get_clientdata(client);
233 disable_irq(pcf->irq);
236 ret = pcf50633_read_block(pcf, PCF50633_REG_INT1M,
237 ARRAY_SIZE(pcf->suspend_irq_masks),
238 pcf->suspend_irq_masks);
240 dev_err(pcf->dev, "error saving irq masks\n");
246 res[i] = ~pcf->pdata->resumers[i];
248 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
251 dev_err(pcf->dev, "error writing wakeup irq masks\n");
255 pcf->is_suspended = 1;
264 struct pcf50633 *pcf = i2c_get_clientdata(client);
268 ret = pcf50633_write_block(pcf, PCF50633_REG_INT1M,
269 ARRAY_SIZE(pcf->suspend_irq_masks),
270 pcf->suspend_irq_masks);
272 dev_err(pcf->dev, "Error restoring saved suspend masks\n");
274 enable_irq(pcf->irq);
281 int pcf50633_irq_init(struct pcf50633 *pcf, int irq)
285 pcf->irq = irq;
288 pcf->mask_regs[0] = 0x80;
289 pcf50633_reg_write(pcf, PCF50633_REG_INT1M, pcf->mask_regs[0]);
290 pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
291 pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
292 pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
293 pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
297 "pcf50633", pcf);
300 dev_err(pcf->dev, "Failed to request IRQ %d\n", ret);
303 dev_err(pcf->dev, "IRQ %u cannot be enabled as wake-up source"
309 void pcf50633_irq_free(struct pcf50633 *pcf)
311 free_irq(pcf->irq, pcf);