Lines Matching defs:enable
854 static void request_even_slower_clocks(bool enable)
875 if (enable) {
960 * @enable: true to request the higher voltage, false to drop a request.
962 * Calls to this function to enable and disable requests must be balanced.
964 int db8500_prcmu_request_ape_opp_100_voltage(bool enable)
972 if (enable) {
1033 static int request_pll(u8 clock, bool enable)
1038 clock = (enable ? PLL_SOC0_ON : PLL_SOC0_OFF);
1040 clock = (enable ? PLL_SOC1_ON : PLL_SOC1_OFF);
1184 static int request_sysclk(bool enable)
1198 writeb((enable ? ON : OFF), (tcdm_base + PRCM_REQ_MB3_SYSCLK_MGT));
1206 * The firmware only sends an ACK if we want to enable the
1209 if (enable && !wait_for_completion_timeout(&mb3_transfer.sysclk_work,
1221 static int request_timclk(bool enable)
1235 if (!enable)
1245 static int request_clock(u8 clock, bool enable)
1257 if (enable) {
1273 static int request_sga_clock(u8 clock, bool enable)
1278 if (enable) {
1283 ret = request_clock(clock, enable);
1285 if (!ret && !enable) {
1302 static int request_plldsi(bool enable)
1308 PRCM_MMIP_LS_CLAMP_DSIPLL_CLAMPI), (enable ?
1312 if (enable)
1318 if (enable) {
1343 static int request_dsiclk(u8 n, bool enable)
1349 val |= ((enable ? dsiclk[n].divsel : PRCM_DSI_PLLOUT_SEL_OFF) <<
1355 static int request_dsiescclk(u8 n, bool enable)
1360 enable ? (val |= dsiescclk[n].en) : (val &= ~dsiescclk[n].en);
1368 * @enable: Whether the clock should be enabled (true) or disabled (false).
1373 int db8500_prcmu_request_clock(u8 clock, bool enable)
1376 return request_sga_clock(clock, enable);
1378 return request_clock(clock, enable);
1380 return request_timclk(enable);
1382 return request_dsiclk((clock - PRCMU_DSI0CLK), enable);
1384 return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable);
1386 return request_plldsi(enable);
1388 return request_sysclk(enable);
1390 return request_pll(clock, enable);