Lines Matching defs:PLL_FIX
461 PLL_FIX,
471 CLK_MGT_ENTRY(UARTCLK, PLL_FIX, true),
472 CLK_MGT_ENTRY(MSP02CLK, PLL_FIX, true),
473 CLK_MGT_ENTRY(MSP1CLK, PLL_FIX, true),
474 CLK_MGT_ENTRY(I2CCLK, PLL_FIX, true),
476 CLK_MGT_ENTRY(SLIMCLK, PLL_FIX, true),
483 CLK_MGT_ENTRY(LCDCLK, PLL_FIX, true),
487 CLK_MGT_ENTRY(HDMICLK, PLL_FIX, false),
491 CLK_MGT_ENTRY(IPI2CCLK, PLL_FIX, true),
492 CLK_MGT_ENTRY(DSIALTCLK, PLL_FIX, false),
495 CLK_MGT_ENTRY(TVCLK, PLL_FIX, true),
496 CLK_MGT_ENTRY(SSPCLK, PLL_FIX, true),
497 CLK_MGT_ENTRY(RNGCLK, PLL_FIX, true),
498 CLK_MGT_ENTRY(UICCCLK, PLL_FIX, false),
1419 if ((branch == PLL_FIX) || ((branch == PLL_DIV) &&
1483 rate = pll_rate(PRCM_PLLDDR_FREQ, ROOT_CLOCK_RATE, PLL_FIX);