Lines Matching refs:value
518 static void emc_ccfifo_writel(struct tegra_emc *emc, u32 value,
521 writel(value, emc->regs + EMC_CCFIFO_DATA);
528 u32 value;
533 value = readl(emc->regs + EMC_STATUS);
534 if ((value & EMC_STATUS_TIMING_UPDATE_STALLED) == 0)
545 u32 value;
550 value = readl(emc->regs + EMC_AUTO_CAL_STATUS);
551 if ((value & EMC_AUTO_CAL_STATUS_ACTIVE) == 0)
562 u32 value;
565 value = readl(emc->regs + EMC_INTSTATUS);
566 if (value & EMC_INTSTATUS_CLKCHANGE_COMPLETE)
924 u32 value;
927 err = of_property_read_u32(node, "clock-frequency", &value);
934 timing->rate = value;
1037 u32 value;
1039 err = of_property_read_u32(np, "nvidia,ram-code", &value);
1040 if (err || (value != ram_code))
1139 * - min_rate: Writing a value to this file sets the given frequency as the
1144 * - max_rate: Similarily to the min_rate file, writing a value to this file
1146 * the value is lower than the currently configured EMC frequency, this