Lines Matching refs:target_volt
448 * @target_volt: new voltage which is chosen to be final
456 unsigned long target_volt)
460 if (dmc->curr_volt <= target_volt)
463 ret = regulator_set_voltage(dmc->vdd_mif, target_volt,
464 target_volt);
466 dmc->curr_volt = target_volt;
474 * @target_volt: new voltage which is chosen to be final
482 unsigned long target_volt)
486 if (dmc->curr_volt >= target_volt)
489 ret = regulator_set_voltage(dmc->vdd_mif, target_volt,
490 target_volt);
492 dmc->curr_volt = target_volt;
521 * @target_volt: new voltage which is going to be set as a final
531 unsigned long target_volt)
540 ret = exynos5_dmc_align_bypass_voltage(dmc, target_volt);
564 * @target_volt: requested voltage which corresponds to the new frequency
585 unsigned long target_volt)
590 target_volt);
627 ret = exynos5_dmc_align_target_voltage(dmc, target_volt);
644 * @target_volt: returned voltage which corresponds to the returned
650 * 'target_volt' or returns error value when OPP framework fails.
655 unsigned long *target_volt, u32 flags)
664 *target_volt = dev_pm_opp_get_voltage(opp);
687 unsigned long target_volt = 0;
690 ret = exynos5_dmc_get_volt_freq(dmc, freq, &target_rate, &target_volt,
701 ret = exynos5_dmc_change_freq_and_volt(dmc, target_rate, target_volt);
1257 unsigned long target_volt = 0;
1297 &target_volt, 0);
1301 dmc->curr_volt = target_volt;