Lines Matching refs:pwr_mgmt_ctrl
372 u32 pwr_mgmt_ctrl = 0, timeout;
441 pwr_mgmt_ctrl = (timeout << shift) & mask;
443 pwr_mgmt_ctrl |= (SR_TIM_MASK | CS_TIM_MASK | PD_TIM_MASK) &
448 pwr_mgmt_ctrl &= ~CS_TIM_MASK;
450 pwr_mgmt_ctrl |= lpmode << LP_MODE_SHIFT;
452 return pwr_mgmt_ctrl;
715 u32 pwr_mgmt_ctrl, zq, temp_alert_cfg;
728 pwr_mgmt_ctrl = get_pwr_mgmt_ctrl(1000000000, emif,
730 emif->lpmode = (pwr_mgmt_ctrl & LP_MODE_MASK) >> LP_MODE_SHIFT;
731 writel(pwr_mgmt_ctrl, base + EMIF_POWER_MANAGEMENT_CONTROL);