Lines Matching defs:tmp
114 u8 mode, tmp;
157 &tmp);
161 tmp |= V6_MPEG_SER_MSB_FIRST;
163 tmp &= ~V6_MPEG_SER_MSB_FIRST;
167 tmp);
235 u8 tmp;
239 ret = mxl111sf_read_reg(state, V6_I2S_STREAM_START_BIT_REG, &tmp);
243 tmp &= 0xe0;
244 tmp |= msb_start_pos;
245 ret = mxl111sf_write_reg(state, V6_I2S_STREAM_START_BIT_REG, tmp);
249 ret = mxl111sf_read_reg(state, V6_I2S_STREAM_END_BIT_REG, &tmp);
253 tmp &= 0xe0;
254 tmp |= data_width;
255 ret = mxl111sf_write_reg(state, V6_I2S_STREAM_END_BIT_REG, tmp);