Lines Matching refs:base
91 void __iomem *base;
108 status = readl(ir->base + SUNXI_IR_RXSTA_REG);
111 writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
121 dt = readb(ir->base + SUNXI_IR_RXFIFO_REG);
166 ir->base + SUNXI_IR_CIR_REG);
196 writel(REG_CTL_MD, ir->base + SUNXI_IR_CTL_REG);
202 writel(REG_RXCTL_RPPI, ir->base + SUNXI_IR_RXCTL_REG);
205 writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
213 ir->base + SUNXI_IR_RXINT_REG);
216 tmp = readl(ir->base + SUNXI_IR_CTL_REG);
217 writel(tmp | REG_CTL_GEN | REG_CTL_RXEN, ir->base + SUNXI_IR_CTL_REG);
298 dev_err(dev, "set ir base clock failed!\n");
301 dev_dbg(dev, "set base clock frequency to %d Hz.\n", b_clk_freq);
304 ir->base = devm_platform_ioremap_resource(pdev, 0);
305 if (IS_ERR(ir->base)) {
306 return PTR_ERR(ir->base);