Lines Matching refs:dev
134 static void ite_decode_bytes(struct ite_dev *dev, const u8 * data, int
150 ir_raw_event_store_with_filter(dev->rdev, &ev);
157 ir_raw_event_store_with_filter(dev->rdev, &ev);
164 ir_raw_event_store_with_filter(dev->rdev, &ev);
169 ir_raw_event_handle(dev->rdev);
171 dev_dbg(&dev->rdev->dev, "decoded %d bytes\n", length);
176 static void ite_set_carrier_params(struct ite_dev *dev)
181 bool for_tx = dev->transmitting;
185 freq = dev->tx_carrier_freq;
189 low_freq = dev->rx_low_carrier_freq;
190 high_freq = dev->rx_high_carrier_freq;
218 dev->params->set_carrier_params(dev, ite_is_high_carrier_freq(freq),
220 ite_get_pulse_width_bits(freq, dev->tx_duty_cycle));
226 struct ite_dev *dev = data;
233 spin_lock(&dev->lock);
236 iflags = dev->params->get_irq_causes(dev);
240 dev_warn(&dev->rdev->dev, "receive overflow\n");
241 ir_raw_event_overflow(dev->rdev);
247 rx_bytes = dev->params->get_rx_bytes(dev, rx_buf,
250 dev_dbg(&dev->rdev->dev, "interrupt %d RX bytes\n", rx_bytes);
256 spin_unlock(&dev->lock);
259 ite_decode_bytes(dev, rx_buf, rx_bytes);
262 spin_lock(&dev->lock);
269 dev_dbg(&dev->rdev->dev, "interrupt TX FIFO\n");
272 wake_up_interruptible(&dev->tx_queue);
279 spin_unlock(&dev->lock);
289 struct ite_dev *dev = rcdev->priv;
291 spin_lock_irqsave(&dev->lock, flags);
292 dev->rx_low_carrier_freq = carrier_low;
293 dev->rx_high_carrier_freq = carrier_high;
294 ite_set_carrier_params(dev);
295 spin_unlock_irqrestore(&dev->lock, flags);
304 struct ite_dev *dev = rcdev->priv;
306 spin_lock_irqsave(&dev->lock, flags);
307 dev->tx_carrier_freq = carrier;
308 ite_set_carrier_params(dev);
309 spin_unlock_irqrestore(&dev->lock, flags);
318 struct ite_dev *dev = rcdev->priv;
320 spin_lock_irqsave(&dev->lock, flags);
321 dev->tx_duty_cycle = duty_cycle;
322 ite_set_carrier_params(dev);
323 spin_unlock_irqrestore(&dev->lock, flags);
334 struct ite_dev *dev = rcdev->priv;
345 spin_lock_irqsave(&dev->lock, flags);
348 dev->transmitting = true;
351 ite_set_carrier_params(dev);
359 dev->params->disable_rx(dev);
365 fifo_avail = ITE_TX_FIFO_LEN - dev->params->get_tx_used_slots(dev);
373 dev_dbg(&dev->rdev->dev, "%s: %d\n",
408 fifo_avail = ITE_TX_FIFO_LEN - dev->params->get_tx_used_slots(dev);
413 dev->params->enable_tx_interrupt(dev);
416 spin_unlock_irqrestore(&dev->lock, flags);
419 wait_event_interruptible(dev->tx_queue,
420 (fifo_avail = ITE_TX_FIFO_LEN - dev->params->get_tx_used_slots(dev)) >= 8);
423 spin_lock_irqsave(&dev->lock, flags);
426 dev->params->disable_tx_interrupt(dev);
430 dev->params->put_tx_byte(dev, val);
438 fifo_remaining = dev->params->get_tx_used_slots(dev);
449 spin_unlock_irqrestore(&dev->lock, flags);
455 spin_lock_irqsave(&dev->lock, flags);
458 dev->transmitting = false;
461 ite_set_carrier_params(dev);
464 dev->params->enable_rx(dev);
467 wake_up_interruptible(&dev->tx_ended);
469 spin_unlock_irqrestore(&dev->lock, flags);
478 struct ite_dev *dev = rcdev->priv;
481 spin_lock_irqsave(&dev->lock, flags);
482 dev->params->idle_rx(dev);
483 spin_unlock_irqrestore(&dev->lock, flags);
493 static int it87_get_irq_causes(struct ite_dev *dev)
499 iflags = inb(dev->cir_addr + IT87_IIR) & IT87_II;
517 static void it87_set_carrier_params(struct ite_dev *dev, bool high_freq,
525 val = inb(dev->cir_addr + IT87_RCR)
536 outb(val, dev->cir_addr + IT87_RCR);
540 dev->cir_addr + IT87_TCR2);
545 static int it87_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
550 fifo = inb(dev->cir_addr + IT87_RSR) & IT87_RXFBC;
553 *(buf++) = inb(dev->cir_addr + IT87_DR);
565 static int it87_get_tx_used_slots(struct ite_dev *dev)
567 return inb(dev->cir_addr + IT87_TSR) & IT87_TXFBC;
571 static void it87_put_tx_byte(struct ite_dev *dev, u8 value)
573 outb(value, dev->cir_addr + IT87_DR);
578 static void it87_idle_rx(struct ite_dev *dev)
581 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXACT,
582 dev->cir_addr + IT87_RCR);
585 outb(inb(dev->cir_addr + IT87_TCR1) | IT87_FIFOCLR,
586 dev->cir_addr + IT87_TCR1);
590 static void it87_disable_rx(struct ite_dev *dev)
593 outb(inb(dev->cir_addr + IT87_IER) & ~(IT87_RDAIE | IT87_RFOIE),
594 dev->cir_addr + IT87_IER);
597 outb(inb(dev->cir_addr + IT87_RCR) & ~IT87_RXEN,
598 dev->cir_addr + IT87_RCR);
602 it87_idle_rx(dev);
606 static void it87_enable_rx(struct ite_dev *dev)
609 outb(inb(dev->cir_addr + IT87_RCR) | IT87_RXEN,
610 dev->cir_addr + IT87_RCR);
613 it87_idle_rx(dev);
616 outb(inb(dev->cir_addr + IT87_IER) | IT87_RDAIE | IT87_RFOIE | IT87_IEC,
617 dev->cir_addr + IT87_IER);
622 static void it87_disable_tx_interrupt(struct ite_dev *dev)
625 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_TLDLIE,
626 dev->cir_addr + IT87_IER);
631 static void it87_enable_tx_interrupt(struct ite_dev *dev)
634 outb(inb(dev->cir_addr + IT87_IER) | IT87_TLDLIE | IT87_IEC,
635 dev->cir_addr + IT87_IER);
639 static void it87_disable(struct ite_dev *dev)
642 outb(inb(dev->cir_addr + IT87_IER) &
644 dev->cir_addr + IT87_IER);
647 it87_disable_rx(dev);
650 outb(IT87_FIFOCLR | inb(dev->cir_addr + IT87_TCR1),
651 dev->cir_addr + IT87_TCR1);
655 static void it87_init_hardware(struct ite_dev *dev)
659 outb((inb(dev->cir_addr + IT87_IER) &
661 dev->cir_addr + IT87_IER);
664 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT87_BDLR);
665 outb((ITE_BAUDRATE_DIVISOR >> 8) & 0xff, dev->cir_addr + IT87_BDHR);
668 outb(inb(dev->cir_addr + IT87_IER) & ~IT87_BR,
669 dev->cir_addr + IT87_IER);
672 outb(ITE_RXDCR_DEFAULT, dev->cir_addr + IT87_RCR);
677 dev->cir_addr + IT87_TCR1);
680 ite_set_carrier_params(dev);
688 static int it8708_get_irq_causes(struct ite_dev *dev)
694 iflags = inb(dev->cir_addr + IT8708_C0IIR);
707 static void it8708_set_carrier_params(struct ite_dev *dev, bool high_freq,
715 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
716 dev->cir_addr + IT8708_BANKSEL);
718 val = (inb(dev->cir_addr + IT8708_C0CFR)
724 outb(val, dev->cir_addr + IT8708_C0CFR);
726 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
727 dev->cir_addr + IT8708_BANKSEL);
730 val = inb(dev->cir_addr + IT8708_C0RCR)
738 outb(val, dev->cir_addr + IT8708_C0RCR);
741 val = inb(dev->cir_addr + IT8708_C0TCR) & ~IT85_TXMPW;
743 outb(val, dev->cir_addr + IT8708_C0TCR);
748 static int it8708_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
753 fifo = inb(dev->cir_addr + IT8708_C0RFSR) & IT85_RXFBC;
756 *(buf++) = inb(dev->cir_addr + IT8708_C0DR);
768 static int it8708_get_tx_used_slots(struct ite_dev *dev)
770 return inb(dev->cir_addr + IT8708_C0TFSR) & IT85_TXFBC;
774 static void it8708_put_tx_byte(struct ite_dev *dev, u8 value)
776 outb(value, dev->cir_addr + IT8708_C0DR);
781 static void it8708_idle_rx(struct ite_dev *dev)
784 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXACT,
785 dev->cir_addr + IT8708_C0RCR);
788 outb(inb(dev->cir_addr + IT8708_C0MSTCR) | IT85_FIFOCLR,
789 dev->cir_addr + IT8708_C0MSTCR);
793 static void it8708_disable_rx(struct ite_dev *dev)
796 outb(inb(dev->cir_addr + IT8708_C0IER) &
798 dev->cir_addr + IT8708_C0IER);
801 outb(inb(dev->cir_addr + IT8708_C0RCR) & ~IT85_RXEN,
802 dev->cir_addr + IT8708_C0RCR);
806 it8708_idle_rx(dev);
810 static void it8708_enable_rx(struct ite_dev *dev)
813 outb(inb(dev->cir_addr + IT8708_C0RCR) | IT85_RXEN,
814 dev->cir_addr + IT8708_C0RCR);
817 it8708_idle_rx(dev);
820 outb(inb(dev->cir_addr + IT8708_C0IER)
822 dev->cir_addr + IT8708_C0IER);
827 static void it8708_disable_tx_interrupt(struct ite_dev *dev)
830 outb(inb(dev->cir_addr + IT8708_C0IER) & ~IT85_TLDLIE,
831 dev->cir_addr + IT8708_C0IER);
836 static void it8708_enable_tx_interrupt(struct ite_dev *dev)
839 outb(inb(dev->cir_addr + IT8708_C0IER)
841 dev->cir_addr + IT8708_C0IER);
845 static void it8708_disable(struct ite_dev *dev)
848 outb(inb(dev->cir_addr + IT8708_C0IER) &
850 dev->cir_addr + IT8708_C0IER);
853 it8708_disable_rx(dev);
856 outb(IT85_FIFOCLR | inb(dev->cir_addr + IT8708_C0MSTCR),
857 dev->cir_addr + IT8708_C0MSTCR);
861 static void it8708_init_hardware(struct ite_dev *dev)
864 outb(inb(dev->cir_addr + IT8708_C0IER) &
866 dev->cir_addr + IT8708_C0IER);
869 outb(inb(dev->cir_addr + IT8708_BANKSEL) | IT8708_HRAE,
870 dev->cir_addr + IT8708_BANKSEL);
872 outb(ITE_BAUDRATE_DIVISOR & 0xff, dev->cir_addr + IT8708_C0BDLR);
874 dev->cir_addr + IT8708_C0BDHR);
876 outb(inb(dev->cir_addr + IT8708_BANKSEL) & ~IT8708_HRAE,
877 dev->cir_addr + IT8708_BANKSEL);
880 outb((inb(dev->cir_addr + IT8708_C0MSTCR) &
884 dev->cir_addr + IT8708_C0MSTCR);
887 outb((inb(dev->cir_addr + IT8708_C0RCR) &
891 dev->cir_addr + IT8708_C0RCR);
894 outb((inb(dev->cir_addr + IT8708_C0TCR) &
898 dev->cir_addr + IT8708_C0TCR);
901 ite_set_carrier_params(dev);
907 static inline u8 it8709_rm(struct ite_dev *dev, int index)
909 outb(index, dev->cir_addr + IT8709_RAM_IDX);
910 return inb(dev->cir_addr + IT8709_RAM_VAL);
914 static inline void it8709_wm(struct ite_dev *dev, u8 val, int index)
916 outb(index, dev->cir_addr + IT8709_RAM_IDX);
917 outb(val, dev->cir_addr + IT8709_RAM_VAL);
920 static void it8709_wait(struct ite_dev *dev)
929 if (it8709_rm(dev, IT8709_MODE) == IT8709_IDLE)
935 static u8 it8709_rr(struct ite_dev *dev, int index)
938 it8709_wait(dev);
939 it8709_wm(dev, index, IT8709_REG_IDX);
940 it8709_wm(dev, IT8709_READ, IT8709_MODE);
943 it8709_wait(dev);
946 return it8709_rm(dev, IT8709_REG_VAL);
950 static void it8709_wr(struct ite_dev *dev, u8 val, int index)
954 it8709_wait(dev);
955 it8709_wm(dev, val, IT8709_REG_VAL);
956 it8709_wm(dev, index, IT8709_REG_IDX);
957 it8709_wm(dev, IT8709_WRITE, IT8709_MODE);
963 static int it8709_get_irq_causes(struct ite_dev *dev)
969 iflags = it8709_rm(dev, IT8709_IIR);
982 static void it8709_set_carrier_params(struct ite_dev *dev, bool high_freq,
989 val = (it8709_rr(dev, IT85_C0CFR)
996 it8709_wr(dev, val, IT85_C0CFR);
999 val = it8709_rr(dev, IT85_C0RCR)
1007 it8709_wr(dev, val, IT85_C0RCR);
1010 val = it8709_rr(dev, IT85_C0TCR) & ~IT85_TXMPW;
1012 it8709_wr(dev, val, IT85_C0TCR);
1017 static int it8709_get_rx_bytes(struct ite_dev *dev, u8 * buf, int buf_size)
1022 fifo = it8709_rm(dev, IT8709_RFSR) & IT85_RXFBC;
1025 *(buf++) = it8709_rm(dev, IT8709_FIFO + read);
1034 it8709_wm(dev, 0, IT8709_RFSR);
1042 static int it8709_get_tx_used_slots(struct ite_dev *dev)
1044 return it8709_rr(dev, IT85_C0TFSR) & IT85_TXFBC;
1048 static void it8709_put_tx_byte(struct ite_dev *dev, u8 value)
1050 it8709_wr(dev, value, IT85_C0DR);
1055 static void it8709_idle_rx(struct ite_dev *dev)
1058 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXACT,
1062 it8709_wr(dev, it8709_rr(dev, IT85_C0MSTCR) | IT85_FIFOCLR,
1067 static void it8709_disable_rx(struct ite_dev *dev)
1070 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1075 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) & ~IT85_RXEN,
1079 * in the previous it8709_wr(dev, ) call) */
1080 it8709_idle_rx(dev);
1084 static void it8709_enable_rx(struct ite_dev *dev)
1087 it8709_wr(dev, it8709_rr(dev, IT85_C0RCR) | IT85_RXEN,
1091 it8709_idle_rx(dev);
1094 it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1101 static void it8709_disable_tx_interrupt(struct ite_dev *dev)
1104 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) & ~IT85_TLDLIE,
1110 static void it8709_enable_tx_interrupt(struct ite_dev *dev)
1113 it8709_wr(dev, it8709_rr(dev, IT85_C0IER)
1119 static void it8709_disable(struct ite_dev *dev)
1122 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1127 it8709_disable_rx(dev);
1130 it8709_wr(dev, IT85_FIFOCLR | it8709_rr(dev, IT85_C0MSTCR),
1135 static void it8709_init_hardware(struct ite_dev *dev)
1138 it8709_wr(dev, it8709_rr(dev, IT85_C0IER) &
1143 it8709_wr(dev, ITE_BAUDRATE_DIVISOR & 0xff, IT85_C0BDLR);
1144 it8709_wr(dev, (ITE_BAUDRATE_DIVISOR >> 8) & 0xff,
1148 it8709_wr(dev, (it8709_rr(dev, IT85_C0MSTCR) &
1154 it8709_wr(dev, (it8709_rr(dev, IT85_C0RCR) &
1160 it8709_wr(dev, (it8709_rr(dev, IT85_C0TCR) & ~(IT85_TXMPM | IT85_TXMPW))
1166 ite_set_carrier_params(dev);
1175 struct ite_dev *dev = rcdev->priv;
1178 spin_lock_irqsave(&dev->lock, flags);
1181 dev->params->enable_rx(dev);
1183 spin_unlock_irqrestore(&dev->lock, flags);
1191 struct ite_dev *dev = rcdev->priv;
1194 spin_lock_irqsave(&dev->lock, flags);
1197 spin_unlock_irqrestore(&dev->lock, flags);
1198 wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1199 spin_lock_irqsave(&dev->lock, flags);
1201 dev->params->disable(dev);
1203 spin_unlock_irqrestore(&dev->lock, flags);
1321 dev_dbg(&pdev->dev, "Auto-detected model: %s\n",
1326 dev_info(&pdev->dev, "model has been forced to: %s",
1337 dev_err(&pdev->dev, "IR PNP Port not valid!\n");
1342 dev_err(&pdev->dev, "PNP IRQ not valid!\n");
1371 rdev->dev.parent = &pdev->dev;
1428 struct ite_dev *dev = pnp_get_drvdata(pdev);
1431 spin_lock_irqsave(&dev->lock, flags);
1434 dev->params->disable(dev);
1436 spin_unlock_irqrestore(&dev->lock, flags);
1439 free_irq(dev->cir_irq, dev);
1440 release_region(dev->cir_addr, dev->params->io_region_size);
1442 rc_unregister_device(dev->rdev);
1444 kfree(dev);
1449 struct ite_dev *dev = pnp_get_drvdata(pdev);
1453 wait_event_interruptible(dev->tx_ended, !dev->transmitting);
1455 spin_lock_irqsave(&dev->lock, flags);
1458 dev->params->disable(dev);
1460 spin_unlock_irqrestore(&dev->lock, flags);
1467 struct ite_dev *dev = pnp_get_drvdata(pdev);
1470 spin_lock_irqsave(&dev->lock, flags);
1473 dev->params->init_hardware(dev);
1475 dev->params->enable_rx(dev);
1477 spin_unlock_irqrestore(&dev->lock, flags);
1484 struct ite_dev *dev = pnp_get_drvdata(pdev);
1487 spin_lock_irqsave(&dev->lock, flags);
1490 dev->params->disable(dev);
1492 spin_unlock_irqrestore(&dev->lock, flags);