Lines Matching refs:csi2tx
89 void (*dphy_setup)(struct csi2tx_priv *csi2tx);
176 struct csi2tx_priv *csi2tx = v4l2_subdev_to_csi2tx(subdev);
182 return &csi2tx->pad_fmts[fmt->pad];
234 static void csi2tx_dphy_set_wakeup(struct csi2tx_priv *csi2tx)
237 csi2tx->base + CSI2TX_DPHY_CLK_WAKEUP_REG);
244 static void csi2tx_dphy_init_finish(struct csi2tx_priv *csi2tx, u32 reg)
252 for (i = 0; i < csi2tx->num_lanes; i++)
253 reg |= CSI2TX_DPHY_CFG_LANE_ENABLE(csi2tx->lanes[i] - 1);
254 writel(reg, csi2tx->base + CSI2TX_DPHY_CFG_REG);
261 csi2tx->base + CSI2TX_DPHY_CFG_REG);
265 static void csi2tx_dphy_setup(struct csi2tx_priv *csi2tx)
270 csi2tx_dphy_set_wakeup(csi2tx);
274 for (i = 0; i < csi2tx->num_lanes; i++)
275 reg |= CSI2TX_DPHY_CFG_LANE_RESET(csi2tx->lanes[i] - 1);
276 writel(reg, csi2tx->base + CSI2TX_DPHY_CFG_REG);
278 csi2tx_dphy_init_finish(csi2tx, reg);
282 static void csi2tx_v2_dphy_setup(struct csi2tx_priv *csi2tx)
286 csi2tx_dphy_set_wakeup(csi2tx);
290 writel(reg, csi2tx->base + CSI2TX_V2_DPHY_CFG_REG);
292 csi2tx_dphy_init_finish(csi2tx, reg);
295 static void csi2tx_reset(struct csi2tx_priv *csi2tx)
297 writel(CSI2TX_CONFIG_SRST_REQ, csi2tx->base + CSI2TX_CONFIG_REG);
302 static int csi2tx_start(struct csi2tx_priv *csi2tx)
304 struct media_entity *entity = &csi2tx->subdev.entity;
308 csi2tx_reset(csi2tx);
310 writel(CSI2TX_CONFIG_CFG_REQ, csi2tx->base + CSI2TX_CONFIG_REG);
314 if (csi2tx->vops && csi2tx->vops->dphy_setup) {
315 csi2tx->vops->dphy_setup(csi2tx);
338 struct media_pad *pad = &csi2tx->pads[i];
350 mfmt = &csi2tx->pad_fmts[pad_idx];
365 csi2tx->base + CSI2TX_DT_CFG_REG(stream));
369 csi2tx->base + CSI2TX_DT_FORMAT_REG(stream));
376 csi2tx->base + CSI2TX_STREAM_IF_CFG_REG(stream));
380 writel(0, csi2tx->base + CSI2TX_CONFIG_REG);
385 static void csi2tx_stop(struct csi2tx_priv *csi2tx)
388 csi2tx->base + CSI2TX_CONFIG_REG);
393 struct csi2tx_priv *csi2tx = v4l2_subdev_to_csi2tx(subdev);
396 mutex_lock(&csi2tx->lock);
403 if (!csi2tx->count) {
404 ret = csi2tx_start(csi2tx);
409 csi2tx->count++;
411 csi2tx->count--;
416 if (!csi2tx->count)
417 csi2tx_stop(csi2tx);
421 mutex_unlock(&csi2tx->lock);
434 static int csi2tx_get_resources(struct csi2tx_priv *csi2tx,
441 csi2tx->base = devm_platform_ioremap_resource(pdev, 0);
442 if (IS_ERR(csi2tx->base))
443 return PTR_ERR(csi2tx->base);
445 csi2tx->p_clk = devm_clk_get(&pdev->dev, "p_clk");
446 if (IS_ERR(csi2tx->p_clk)) {
448 return PTR_ERR(csi2tx->p_clk);
451 csi2tx->esc_clk = devm_clk_get(&pdev->dev, "esc_clk");
452 if (IS_ERR(csi2tx->esc_clk)) {
454 return PTR_ERR(csi2tx->esc_clk);
457 ret = clk_prepare_enable(csi2tx->p_clk);
463 dev_cfg = readl(csi2tx->base + CSI2TX_DEVICE_CONFIG_REG);
464 clk_disable_unprepare(csi2tx->p_clk);
466 csi2tx->max_lanes = dev_cfg & CSI2TX_DEVICE_CONFIG_LANES_MASK;
467 if (csi2tx->max_lanes > CSI2TX_LANES_MAX) {
469 csi2tx->max_lanes);
473 csi2tx->max_streams = (dev_cfg & CSI2TX_DEVICE_CONFIG_STREAMS_MASK) >> 4;
474 if (csi2tx->max_streams > CSI2TX_STREAMS_MAX) {
476 csi2tx->max_streams);
480 csi2tx->has_internal_dphy = !!(dev_cfg & CSI2TX_DEVICE_CONFIG_HAS_DPHY);
482 for (i = 0; i < csi2tx->max_streams; i++) {
486 csi2tx->pixel_clk[i] = devm_clk_get(&pdev->dev, clk_name);
487 if (IS_ERR(csi2tx->pixel_clk[i])) {
490 return PTR_ERR(csi2tx->pixel_clk[i]);
497 static int csi2tx_check_lanes(struct csi2tx_priv *csi2tx)
503 ep = of_graph_get_endpoint_by_regs(csi2tx->dev->of_node, 0, 0);
509 dev_err(csi2tx->dev, "Could not parse v4l2 endpoint\n");
514 dev_err(csi2tx->dev, "Unsupported media bus type: 0x%x\n",
520 csi2tx->num_lanes = v4l2_ep.bus.mipi_csi2.num_data_lanes;
521 if (csi2tx->num_lanes > csi2tx->max_lanes) {
522 dev_err(csi2tx->dev,
528 for (i = 0; i < csi2tx->num_lanes; i++) {
530 dev_err(csi2tx->dev, "Invalid lane[%d] number: %u\n",
537 memcpy(csi2tx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes,
538 sizeof(csi2tx->lanes));
555 .compatible = "cdns,csi2tx",
559 .compatible = "cdns,csi2tx-1.3",
563 .compatible = "cdns,csi2tx-2.1",
572 struct csi2tx_priv *csi2tx;
577 csi2tx = kzalloc(sizeof(*csi2tx), GFP_KERNEL);
578 if (!csi2tx)
580 platform_set_drvdata(pdev, csi2tx);
581 mutex_init(&csi2tx->lock);
582 csi2tx->dev = &pdev->dev;
584 ret = csi2tx_get_resources(csi2tx, pdev);
589 csi2tx->vops = (struct csi2tx_vops *)of_id->data;
591 v4l2_subdev_init(&csi2tx->subdev, &csi2tx_subdev_ops);
592 csi2tx->subdev.owner = THIS_MODULE;
593 csi2tx->subdev.dev = &pdev->dev;
594 csi2tx->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
595 snprintf(csi2tx->subdev.name, V4L2_SUBDEV_NAME_SIZE, "%s.%s",
598 ret = csi2tx_check_lanes(csi2tx);
603 csi2tx->subdev.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
604 csi2tx->pads[CSI2TX_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
606 csi2tx->pads[i].flags = MEDIA_PAD_FL_SINK;
615 csi2tx->pad_fmts[i] = fmt_default;
617 ret = media_entity_pads_init(&csi2tx->subdev.entity, CSI2TX_PAD_MAX,
618 csi2tx->pads);
622 ret = v4l2_async_register_subdev(&csi2tx->subdev);
628 csi2tx->num_lanes, csi2tx->max_lanes, csi2tx->max_streams,
629 csi2tx->has_internal_dphy ? "internal" : "no");
634 kfree(csi2tx);
640 struct csi2tx_priv *csi2tx = platform_get_drvdata(pdev);
642 v4l2_async_unregister_subdev(&csi2tx->subdev);
643 kfree(csi2tx);
651 .name = "cdns-csi2tx",