Lines Matching refs:smi_write
29 smi_write(MUX_MODE_CTRL, port_mux);
35 smi_write(VIDEO_CTRL_STATUS_A, port_ctrl);
39 smi_write(MPEG2_CTRL_A, port_ctrl);
43 smi_write(VIDEO_CTRL_STATUS_B, port_ctrl);
47 smi_write(MPEG2_CTRL_B, port_ctrl);
50 smi_write(MSI_INT_ENA_CLR, ALL_INT);
52 smi_write(MSI_INT_STATUS_CLR, int_stat);
71 smi_write(sw_ctl, dwCtrl);
75 smi_write(sw_ctl, dwCtrl);
262 smi_write(MSI_INT_ENA_CLR,
270 smi_write(MSI_INT_ENA_SET,
278 smi_write(MSI_INT_STATUS_CLR,
346 smi_write(port->DMA_MANAGEMENT, dmaManagement);
792 smi_write(port->DMA_CHAN0_ADDR_LOW, dmaMemPtrLow);
793 smi_write(port->DMA_CHAN0_ADDR_HI, dmaMemPtrHi);
794 smi_write(port->DMA_CHAN0_CONTROL, dmaCtlReg);
807 smi_write(port->DMA_CHAN1_ADDR_LOW, dmaMemPtrLow);
808 smi_write(port->DMA_CHAN1_ADDR_HI, dmaMemPtrHi);
809 smi_write(port->DMA_CHAN1_CONTROL, dmaCtlReg);
825 smi_write(port->DMA_MANAGEMENT, dmaManagement);
1039 smi_write(MSI_INT_ENA_CLR, ALL_INT);