Lines Matching refs:iowrite32
40 iowrite32((tmp << 17) | IIC_READ, addr + IIC_CSR2);
47 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
70 iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2);
76 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
96 iowrite32((tmp << 17) | IIC_WRITE | data, addr + IIC_CSR2);
116 iowrite32(DIRECT_ABORT, addr + IIC_CSR1);
156 iowrite32(dma_addr, pd->regs + EVEN_DMA_START);
157 iowrite32(dma_addr + pd->width, pd->regs + ODD_DMA_START);
158 iowrite32(pd->width, pd->regs + EVEN_DMA_STRIDE);
159 iowrite32(pd->width, pd->regs + ODD_DMA_STRIDE);
161 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
163 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
184 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
187 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD, pd->regs + INT_CSR);
246 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START,
252 iowrite32(FIFO_EN | SRST | FLD_CRPT_ODD | FLD_CRPT_EVEN |
269 iowrite32(dma_addr, ipd->regs + EVEN_DMA_START);
270 iowrite32(dma_addr + ipd->width, ipd->regs + ODD_DMA_START);
271 iowrite32(ipd->width, ipd->regs + EVEN_DMA_STRIDE);
272 iowrite32(ipd->width, ipd->regs + ODD_DMA_STRIDE);
276 iowrite32(FLD_START_EN | FLD_END_ODD_EN | FLD_START |
418 iowrite32(ADDR_ERR_ODD | ADDR_ERR_EVEN | FLD_CRPT_ODD | FLD_CRPT_EVEN |
423 iowrite32(FIFO_EN | SRST, pd->regs + CSR1);
424 iowrite32(0xEEEEEE01, pd->regs + EVEN_PIXEL_FMT);
425 iowrite32(0xEEEEEE01, pd->regs + ODD_PIXEL_FMT);
426 iowrite32(0x00000020, pd->regs + FIFO_TRIGGER);
427 iowrite32(0x00000103, pd->regs + XFER_MODE);
428 iowrite32(0, pd->regs + RETRY_WAIT_CNT);
429 iowrite32(0, pd->regs + INT_CSR);
430 iowrite32(1, pd->regs + EVEN_FLD_MASK);
431 iowrite32(1, pd->regs + ODD_FLD_MASK);
432 iowrite32(0, pd->regs + MASK_LENGTH);
433 iowrite32(0x0005007C, pd->regs + FIFO_FLAG_CNT);
434 iowrite32(0x01010101, pd->regs + IIC_CLK_DUR);
473 iowrite32(FLD_START | FLD_END_EVEN | FLD_END_ODD,