Lines Matching refs:x00
396 #define TDA9840_SW 0x00
484 #define TDA9855_VR 0x00 /* Volume, right */
502 /* 0x00 - VR in TDA9855 */
525 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
542 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
570 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
635 #define TDA9873_SW 0x00 /* Switching */
639 /* Subaddress 0x00: Switching Data
829 #define TDA9874A_AGCGR 0x00 /* AGC gain */
857 #define TDA9874A_DSR 0x00 /* device status */
898 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
900 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
902 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
904 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
906 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
908 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
921 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
928 chip_write(chip, TDA9874A_FMMR, 0x00);
930 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
931 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
933 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
949 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
1041 aosr = 0x00; /* always route L to L and R to R */
1059 fmmr = 0x00; /* mono */
1064 fmmr = 0x00;
1065 aosr = 0x00; /* handled by NICAM auto-mute */
1068 aosr = 0x00;
1081 aosr = 0x00; /* dual A/B */
1194 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/
1195 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/
1196 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/
1197 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/
1198 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/
1199 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/
1200 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/
1202 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/
1203 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/
1210 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/
1211 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */
1215 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/
1216 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/
1218 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/
1219 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/
1220 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/
1221 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/
1261 #define TEA6300_VL 0x00 /* volume left */
1273 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1288 #define TEA6420_S_SA 0x00 /* stereo A input */
1316 #define TDA8425_VL 0x00 /* volume left */
1330 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */