Lines Matching defs:ov965x
246 struct ov965x {
415 return &container_of(ctrl->handler, struct ov965x, ctrls.handler)->sd;
418 static inline struct ov965x *to_ov965x(struct v4l2_subdev *sd)
420 return container_of(sd, struct ov965x, sd);
423 static int ov965x_read(struct ov965x *ov965x, u8 addr, u8 *val)
428 ret = regmap_read(ov965x->regmap, addr, &buf);
434 v4l2_dbg(2, debug, &ov965x->sd, "%s: 0x%02x @ 0x%02x. (%d)\n",
440 static int ov965x_write(struct ov965x *ov965x, u8 addr, u8 val)
444 ret = regmap_write(ov965x->regmap, addr, val);
446 v4l2_dbg(2, debug, &ov965x->sd, "%s: 0x%02x @ 0x%02X (%d)\n",
452 static int ov965x_write_array(struct ov965x *ov965x,
458 ret = ov965x_write(ov965x, regs[i].addr, regs[i].value);
463 static int ov965x_set_default_gamma_curve(struct ov965x *ov965x)
476 int ret = ov965x_write(ov965x, addr, gamma_curve[i]);
486 static int ov965x_set_color_matrix(struct ov965x *ov965x)
496 int ret = ov965x_write(ov965x, addr, mtx[i]);
506 static int __ov965x_set_power(struct ov965x *ov965x, int on)
509 int ret = clk_prepare_enable(ov965x->clk);
514 gpiod_set_value_cansleep(ov965x->gpios[GPIO_PWDN], 0);
515 gpiod_set_value_cansleep(ov965x->gpios[GPIO_RST], 0);
518 gpiod_set_value_cansleep(ov965x->gpios[GPIO_RST], 1);
519 gpiod_set_value_cansleep(ov965x->gpios[GPIO_PWDN], 1);
521 clk_disable_unprepare(ov965x->clk);
524 ov965x->streaming = 0;
531 struct ov965x *ov965x = to_ov965x(sd);
536 mutex_lock(&ov965x->lock);
537 if (ov965x->power == !on) {
538 ret = __ov965x_set_power(ov965x, on);
540 ret = ov965x_write_array(ov965x,
542 ov965x->apply_frame_fmt = 1;
543 ov965x->ctrls.update = 1;
547 ov965x->power += on ? 1 : -1;
549 WARN_ON(ov965x->power < 0);
550 mutex_unlock(&ov965x->lock);
558 static void ov965x_update_exposure_ctrl(struct ov965x *ov965x)
560 struct v4l2_ctrl *ctrl = ov965x->ctrls.exposure;
565 mutex_lock(&ov965x->lock);
566 if (WARN_ON(!ctrl || !ov965x->frame_size)) {
567 mutex_unlock(&ov965x->lock);
570 clkrc = DEF_CLKRC + ov965x->fiv->clkrc_div;
572 fint = ov965x->mclk_frequency * ((clkrc >> 7) + 1) /
576 max = ov965x->frame_size->max_exp_lines * trow;
577 ov965x->exp_row_interval = trow;
578 mutex_unlock(&ov965x->lock);
580 v4l2_dbg(1, debug, &ov965x->sd, "clkrc: %#x, fi: %lu, tr: %lu, %d\n",
589 v4l2_err(&ov965x->sd, "Exposure ctrl range update failed\n");
592 static int ov965x_set_banding_filter(struct ov965x *ov965x, int value)
598 ret = ov965x_read(ov965x, REG_COM8, ®);
604 ret = ov965x_write(ov965x, REG_COM8, reg);
608 if (WARN_ON(!ov965x->fiv))
615 mbd = (1000UL * ov965x->fiv->interval.denominator *
616 ov965x->frame_size->max_exp_lines) /
617 ov965x->fiv->interval.numerator;
620 return ov965x_write(ov965x, REG_MBD, mbd);
623 static int ov965x_set_white_balance(struct ov965x *ov965x, int awb)
628 ret = ov965x_read(ov965x, REG_COM8, ®);
631 ret = ov965x_write(ov965x, REG_COM8, reg);
634 ret = ov965x_write(ov965x, REG_BLUE,
635 ov965x->ctrls.blue_balance->val);
638 ret = ov965x_write(ov965x, REG_RED,
639 ov965x->ctrls.red_balance->val);
647 static int ov965x_set_brightness(struct ov965x *ov965x, int val)
666 ret = ov965x_write(ov965x, regs[0][i],
671 static int ov965x_set_gain(struct ov965x *ov965x, int auto_gain)
673 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
681 ret = ov965x_read(ov965x, REG_COM8, ®);
688 ret = ov965x_write(ov965x, REG_COM8, reg);
712 ret = ov965x_write(ov965x, REG_GAIN, rgain & 0xff);
715 ret = ov965x_read(ov965x, REG_VREF, ®);
720 ret = ov965x_write(ov965x, REG_VREF, reg);
730 static int ov965x_set_sharpness(struct ov965x *ov965x, unsigned int value)
735 ret = ov965x_read(ov965x, REG_COM14, &com14);
738 ret = ov965x_read(ov965x, REG_EDGE, &edge);
749 ret = ov965x_write(ov965x, REG_COM14, com14);
756 return ov965x_write(ov965x, REG_EDGE, edge);
759 static int ov965x_set_exposure(struct ov965x *ov965x, int exp)
761 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
767 ret = ov965x_read(ov965x, REG_COM8, ®);
774 ret = ov965x_write(ov965x, REG_COM8, reg);
781 / ov965x->exp_row_interval;
786 ret = ov965x_write(ov965x, REG_COM1, exposure & 0x3);
788 ret = ov965x_write(ov965x, REG_AECH,
791 ret = ov965x_write(ov965x, REG_AECHM,
794 ctrls->exposure->val = ((exposure * ov965x->exp_row_interval)
800 v4l2_ctrl_activate(ov965x->ctrls.brightness, !exp);
804 static int ov965x_set_flip(struct ov965x *ov965x)
808 if (ov965x->ctrls.hflip->val)
811 if (ov965x->ctrls.vflip->val)
814 return ov965x_write(ov965x, REG_MVFP, mvfp);
820 static int ov965x_set_saturation(struct ov965x *ov965x, int val)
838 ret = ov965x_write(ov965x, addr + i, regs[val][i]);
843 static int ov965x_set_test_pattern(struct ov965x *ov965x, int value)
848 ret = ov965x_read(ov965x, REG_COM23, ®);
852 return ov965x_write(ov965x, REG_COM23, reg);
855 static int __g_volatile_ctrl(struct ov965x *ov965x, struct v4l2_ctrl *ctrl)
861 if (!ov965x->power)
868 ret = ov965x_read(ov965x, REG_GAIN, ®0);
871 ret = ov965x_read(ov965x, REG_VREF, ®1);
876 ov965x->ctrls.gain->val = m * (16 + (gain & 0xf));
882 ret = ov965x_read(ov965x, REG_COM1, ®0);
885 ret = ov965x_read(ov965x, REG_AECH, ®1);
888 ret = ov965x_read(ov965x, REG_AECHM, ®2);
893 ov965x->ctrls.exposure->val = ((exposure *
894 ov965x->exp_row_interval) + 50) / 100;
904 struct ov965x *ov965x = to_ov965x(sd);
909 mutex_lock(&ov965x->lock);
910 ret = __g_volatile_ctrl(ov965x, ctrl);
911 mutex_unlock(&ov965x->lock);
918 struct ov965x *ov965x = to_ov965x(sd);
922 ctrl->name, ctrl->val, ov965x->power);
924 mutex_lock(&ov965x->lock);
929 if (ov965x->power == 0) {
930 mutex_unlock(&ov965x->lock);
936 ret = ov965x_set_white_balance(ov965x, ctrl->val);
940 ret = ov965x_set_brightness(ov965x, ctrl->val);
944 ret = ov965x_set_exposure(ov965x, ctrl->val);
948 ret = ov965x_set_gain(ov965x, ctrl->val);
952 ret = ov965x_set_flip(ov965x);
956 ret = ov965x_set_banding_filter(ov965x, ctrl->val);
960 ret = ov965x_set_saturation(ov965x, ctrl->val);
964 ret = ov965x_set_sharpness(ov965x, ctrl->val);
968 ret = ov965x_set_test_pattern(ov965x, ctrl->val);
972 mutex_unlock(&ov965x->lock);
986 static int ov965x_initialize_controls(struct ov965x *ov965x)
989 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
1054 ov965x->sd.ctrl_handler = hdl;
1107 struct ov965x *ov965x = to_ov965x(sd);
1109 mutex_lock(&ov965x->lock);
1110 fi->interval = ov965x->fiv->interval;
1111 mutex_unlock(&ov965x->lock);
1116 static int __ov965x_set_frame_interval(struct ov965x *ov965x,
1119 struct v4l2_mbus_framefmt *mbus_fmt = &ov965x->format;
1143 ov965x->fiv = fiv;
1145 v4l2_dbg(1, debug, &ov965x->sd, "Changed frame interval to %u us\n",
1154 struct ov965x *ov965x = to_ov965x(sd);
1160 mutex_lock(&ov965x->lock);
1161 ret = __ov965x_set_frame_interval(ov965x, fi);
1162 ov965x->apply_frame_fmt = 1;
1163 mutex_unlock(&ov965x->lock);
1171 struct ov965x *ov965x = to_ov965x(sd);
1180 mutex_lock(&ov965x->lock);
1181 fmt->format = ov965x->format;
1182 mutex_unlock(&ov965x->lock);
1218 struct ov965x *ov965x = to_ov965x(sd);
1232 mutex_lock(&ov965x->lock);
1241 if (ov965x->streaming) {
1244 ov965x->frame_size = size;
1245 ov965x->format = fmt->format;
1246 ov965x->tslb_reg = ov965x_formats[index].tslb_reg;
1247 ov965x->apply_frame_fmt = 1;
1256 __ov965x_set_frame_interval(ov965x, &fiv);
1258 mutex_unlock(&ov965x->lock);
1261 ov965x_update_exposure_ctrl(ov965x);
1266 static int ov965x_set_frame_size(struct ov965x *ov965x)
1271 ret = ov965x_write(ov965x, frame_size_reg_addr[i],
1272 ov965x->frame_size->regs[i]);
1276 static int __ov965x_set_params(struct ov965x *ov965x)
1278 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
1282 if (ov965x->apply_frame_fmt) {
1283 reg = DEF_CLKRC + ov965x->fiv->clkrc_div;
1284 ret = ov965x_write(ov965x, REG_CLKRC, reg);
1287 ret = ov965x_set_frame_size(ov965x);
1290 ret = ov965x_read(ov965x, REG_TSLB, ®);
1294 reg |= ov965x->tslb_reg;
1295 ret = ov965x_write(ov965x, REG_TSLB, reg);
1299 ret = ov965x_set_default_gamma_curve(ov965x);
1302 ret = ov965x_set_color_matrix(ov965x);
1309 ret = ov965x_read(ov965x, REG_COM11, ®);
1312 ret = ov965x_write(ov965x, REG_COM11, reg);
1319 return ov965x_set_banding_filter(ov965x, ctrls->light_freq->val);
1324 struct ov965x *ov965x = to_ov965x(sd);
1325 struct ov965x_ctrls *ctrls = &ov965x->ctrls;
1330 mutex_lock(&ov965x->lock);
1331 if (ov965x->streaming == !on) {
1333 ret = __ov965x_set_params(ov965x);
1340 mutex_unlock(&ov965x->lock);
1343 mutex_lock(&ov965x->lock);
1348 ret = ov965x_write(ov965x, REG_COM2,
1352 ov965x->streaming += on ? 1 : -1;
1354 WARN_ON(ov965x->streaming < 0);
1355 mutex_unlock(&ov965x->lock);
1403 static int ov965x_configure_gpios(struct ov965x *ov965x)
1405 struct device *dev = regmap_get_device(ov965x->regmap);
1407 ov965x->gpios[GPIO_PWDN] = devm_gpiod_get_optional(dev, "powerdown",
1409 if (IS_ERR(ov965x->gpios[GPIO_PWDN])) {
1411 return PTR_ERR(ov965x->gpios[GPIO_PWDN]);
1414 ov965x->gpios[GPIO_RST] = devm_gpiod_get_optional(dev, "reset",
1416 if (IS_ERR(ov965x->gpios[GPIO_RST])) {
1418 return PTR_ERR(ov965x->gpios[GPIO_RST]);
1426 struct ov965x *ov965x = to_ov965x(sd);
1430 mutex_lock(&ov965x->lock);
1431 ret = __ov965x_set_power(ov965x, 1);
1438 ret = ov965x_read(ov965x, REG_PID, &pid);
1440 ret = ov965x_read(ov965x, REG_VER, &ver);
1442 __ov965x_set_power(ov965x, 0);
1445 ov965x->id = OV965X_ID(pid, ver);
1446 if (ov965x->id == OV9650_ID || ov965x->id == OV9652_ID) {
1447 v4l2_info(sd, "Found OV%04X sensor\n", ov965x->id);
1450 ov965x->id);
1455 mutex_unlock(&ov965x->lock);
1463 struct ov965x *ov965x;
1471 ov965x = devm_kzalloc(&client->dev, sizeof(*ov965x), GFP_KERNEL);
1472 if (!ov965x)
1475 ov965x->regmap = devm_regmap_init_sccb(client, &ov965x_regmap_config);
1476 if (IS_ERR(ov965x->regmap)) {
1478 return PTR_ERR(ov965x->regmap);
1482 ov965x->clk = devm_clk_get(&client->dev, NULL);
1483 if (IS_ERR(ov965x->clk))
1484 return PTR_ERR(ov965x->clk);
1485 ov965x->mclk_frequency = clk_get_rate(ov965x->clk);
1487 ret = ov965x_configure_gpios(ov965x);
1497 mutex_init(&ov965x->lock);
1499 sd = &ov965x->sd;
1507 ov965x->pad.flags = MEDIA_PAD_FL_SOURCE;
1509 ret = media_entity_pads_init(&sd->entity, 1, &ov965x->pad);
1513 ret = ov965x_initialize_controls(ov965x);
1517 ov965x_get_default_format(&ov965x->format);
1518 ov965x->frame_size = &ov965x_framesizes[0];
1519 ov965x->fiv = &ov965x_intervals[0];
1526 ov965x_update_exposure_ctrl(ov965x);
1538 mutex_destroy(&ov965x->lock);
1545 struct ov965x *ov965x = to_ov965x(sd);
1550 mutex_destroy(&ov965x->lock);