Lines Matching defs:clkrc
250 u8 clkrc; /* Clock divider value */
798 u32 clkrc = info->clkrc;
806 clkrc++;
808 clkrc = (clkrc >> 1);
812 (4 * clkrc);
820 ret = ov7670_write(sd, REG_CLKRC, info->clkrc);
832 u32 clkrc;
839 * pixclk = clock_speed / (clkrc + 1) * PLLfactor
843 clkrc = 0;
846 clkrc = (5 * pll_factor * info->clock_speed * tpf->numerator) /
849 clkrc = (clkrc << 1);
850 clkrc--;
854 * The datasheet claims that clkrc = 0 will divide the input clock by 1
856 * So, if clkrc = 0 just bypass the divider.
858 if (clkrc <= 0)
859 clkrc = CLK_EXT;
860 else if (clkrc > CLK_SCALE)
861 clkrc = CLK_SCALE;
862 info->clkrc = clkrc;
885 if ((info->clkrc & CLK_EXT) == 0 && (info->clkrc & CLK_SCALE) > 1)
886 tpf->denominator /= (info->clkrc & CLK_SCALE);
903 info->clkrc = (info->clkrc & 0x80) | div;
913 return ov7670_write(sd, REG_CLKRC, info->clkrc);
1087 * If we're running RGB565, we must rewrite clkrc after setting
1089 * doing RGB565, we must not rewrite clkrc or the image looks
1092 * (Update) Now that we retain clkrc state, we should be able
1096 ret = ov7670_write(sd, REG_CLKRC, info->clkrc);
1932 info->clkrc = 0;