Lines Matching refs:ov7251
125 struct ov7251 {
164 static inline struct ov7251 *to_ov7251(struct v4l2_subdev *sd)
166 return container_of(sd, struct ov7251, sd);
684 static int ov7251_regulators_enable(struct ov7251 *ov7251)
692 ret = regulator_enable(ov7251->io_regulator);
694 dev_err(ov7251->dev, "set io voltage failed\n");
698 ret = regulator_enable(ov7251->analog_regulator);
700 dev_err(ov7251->dev, "set analog voltage failed\n");
704 ret = regulator_enable(ov7251->core_regulator);
706 dev_err(ov7251->dev, "set core voltage failed\n");
713 regulator_disable(ov7251->analog_regulator);
716 regulator_disable(ov7251->io_regulator);
721 static void ov7251_regulators_disable(struct ov7251 *ov7251)
725 ret = regulator_disable(ov7251->core_regulator);
727 dev_err(ov7251->dev, "core regulator disable failed\n");
729 ret = regulator_disable(ov7251->analog_regulator);
731 dev_err(ov7251->dev, "analog regulator disable failed\n");
733 ret = regulator_disable(ov7251->io_regulator);
735 dev_err(ov7251->dev, "io regulator disable failed\n");
738 static int ov7251_write_reg(struct ov7251 *ov7251, u16 reg, u8 val)
747 ret = i2c_master_send(ov7251->i2c_client, regbuf, 3);
749 dev_err(ov7251->dev, "%s: write reg error %d: reg=%x, val=%x\n",
757 static int ov7251_write_seq_regs(struct ov7251 *ov7251, u16 reg, u8 *val,
772 ret = i2c_master_send(ov7251->i2c_client, regbuf, nregbuf);
774 dev_err(ov7251->dev,
783 static int ov7251_read_reg(struct ov7251 *ov7251, u16 reg, u8 *val)
791 ret = i2c_master_send(ov7251->i2c_client, regbuf, 2);
793 dev_err(ov7251->dev, "%s: write reg error %d: reg=%x\n",
798 ret = i2c_master_recv(ov7251->i2c_client, val, 1);
800 dev_err(ov7251->dev, "%s: read reg error %d: reg=%x\n",
808 static int ov7251_pll_configure(struct ov7251 *ov7251)
813 configs = ov7251->pll_cfgs;
815 ret = ov7251_write_reg(ov7251, OV7251_PLL1_PRE_DIV_REG,
816 configs->pll1[ov7251->link_freq_idx]->pre_div);
820 ret = ov7251_write_reg(ov7251, OV7251_PLL1_MULT_REG,
821 configs->pll1[ov7251->link_freq_idx]->mult);
824 ret = ov7251_write_reg(ov7251, OV7251_PLL1_DIVIDER_REG,
825 configs->pll1[ov7251->link_freq_idx]->div);
829 ret = ov7251_write_reg(ov7251, OV7251_PLL1_PIX_DIV_REG,
830 configs->pll1[ov7251->link_freq_idx]->pix_div);
834 ret = ov7251_write_reg(ov7251, OV7251_PLL1_MIPI_DIV_REG,
835 configs->pll1[ov7251->link_freq_idx]->mipi_div);
839 ret = ov7251_write_reg(ov7251, OV7251_PLL2_PRE_DIV_REG,
844 ret = ov7251_write_reg(ov7251, OV7251_PLL2_MULT_REG,
849 ret = ov7251_write_reg(ov7251, OV7251_PLL2_DIVIDER_REG,
854 ret = ov7251_write_reg(ov7251, OV7251_PLL2_SYS_DIV_REG,
859 ret = ov7251_write_reg(ov7251, OV7251_PLL2_ADC_DIV_REG,
865 static int ov7251_set_exposure(struct ov7251 *ov7251, s32 exposure)
875 return ov7251_write_seq_regs(ov7251, reg, val, 3);
878 static int ov7251_set_gain(struct ov7251 *ov7251, s32 gain)
887 return ov7251_write_seq_regs(ov7251, reg, val, 2);
890 static int ov7251_set_register_array(struct ov7251 *ov7251,
898 ret = ov7251_write_reg(ov7251, settings->reg, settings->val);
910 struct ov7251 *ov7251 = to_ov7251(sd);
914 ret = ov7251_regulators_enable(ov7251);
918 ret = clk_prepare_enable(ov7251->xclk);
920 dev_err(ov7251->dev, "clk prepare enable failed\n");
921 ov7251_regulators_disable(ov7251);
925 gpiod_set_value_cansleep(ov7251->enable_gpio, 1);
929 DIV_ROUND_UP(ov7251->xclk_freq, 1000));
932 ret = ov7251_set_register_array(ov7251,
936 dev_err(ov7251->dev, "error during global init\n");
937 gpiod_set_value_cansleep(ov7251->enable_gpio, 0);
938 clk_disable_unprepare(ov7251->xclk);
939 ov7251_regulators_disable(ov7251);
950 struct ov7251 *ov7251 = to_ov7251(sd);
952 clk_disable_unprepare(ov7251->xclk);
953 gpiod_set_value_cansleep(ov7251->enable_gpio, 0);
954 ov7251_regulators_disable(ov7251);
959 static int ov7251_set_hflip(struct ov7251 *ov7251, s32 value)
961 u8 val = ov7251->timing_format2;
969 ret = ov7251_write_reg(ov7251, OV7251_TIMING_FORMAT2, val);
971 ov7251->timing_format2 = val;
976 static int ov7251_set_vflip(struct ov7251 *ov7251, s32 value)
978 u8 val = ov7251->timing_format1;
986 ret = ov7251_write_reg(ov7251, OV7251_TIMING_FORMAT1, val);
988 ov7251->timing_format1 = val;
993 static int ov7251_set_test_pattern(struct ov7251 *ov7251, s32 value)
995 u8 val = ov7251->pre_isp_00;
1003 ret = ov7251_write_reg(ov7251, OV7251_PRE_ISP_00, val);
1005 ov7251->pre_isp_00 = val;
1015 static int ov7251_vts_configure(struct ov7251 *ov7251, s32 vblank)
1019 vts[0] = ((ov7251->current_mode->height + vblank) & 0xff00) >> 8;
1020 vts[1] = ((ov7251->current_mode->height + vblank) & 0x00ff);
1022 return ov7251_write_seq_regs(ov7251, OV7251_TIMING_VTS_REG, vts, 2);
1027 struct ov7251 *ov7251 = container_of(ctrl->handler,
1028 struct ov7251, ctrls);
1035 exposure_max = ov7251->current_mode->height + ctrl->val -
1037 __v4l2_ctrl_modify_range(ov7251->exposure,
1038 ov7251->exposure->minimum,
1040 ov7251->exposure->step,
1041 min(ov7251->exposure->val,
1047 if (!pm_runtime_get_if_in_use(ov7251->dev))
1052 ret = ov7251_set_exposure(ov7251, ctrl->val);
1055 ret = ov7251_set_gain(ov7251, ctrl->val);
1058 ret = ov7251_set_test_pattern(ov7251, ctrl->val);
1061 ret = ov7251_set_hflip(ov7251, ctrl->val);
1064 ret = ov7251_set_vflip(ov7251, ctrl->val);
1067 ret = ov7251_vts_configure(ov7251, ctrl->val);
1074 pm_runtime_put(ov7251->dev);
1135 __ov7251_get_pad_format(struct ov7251 *ov7251,
1142 return v4l2_subdev_get_try_format(&ov7251->sd, sd_state, pad);
1144 return &ov7251->fmt;
1154 struct ov7251 *ov7251 = to_ov7251(sd);
1156 mutex_lock(&ov7251->lock);
1157 format->format = *__ov7251_get_pad_format(ov7251, sd_state,
1160 mutex_unlock(&ov7251->lock);
1166 __ov7251_get_pad_crop(struct ov7251 *ov7251,
1172 return v4l2_subdev_get_try_crop(&ov7251->sd, sd_state, pad);
1174 return &ov7251->crop;
1186 ov7251_find_mode_by_ival(struct ov7251 *ov7251, struct v4l2_fract *timeperframe)
1188 const struct ov7251_mode_info *mode = ov7251->current_mode;
1218 struct ov7251 *ov7251 = to_ov7251(sd);
1225 mutex_lock(&ov7251->lock);
1227 __crop = __ov7251_get_pad_crop(ov7251, sd_state, format->pad,
1239 ret = __v4l2_ctrl_modify_range(ov7251->exposure,
1245 ret = __v4l2_ctrl_s_ctrl(ov7251->exposure,
1250 ret = __v4l2_ctrl_s_ctrl(ov7251->gain, 16);
1256 ret = __v4l2_ctrl_modify_range(ov7251->vblank,
1262 ov7251->current_mode = new_mode;
1265 __format = __ov7251_get_pad_format(ov7251, sd_state, format->pad,
1280 mutex_unlock(&ov7251->lock);
1306 struct ov7251 *ov7251 = to_ov7251(sd);
1311 mutex_lock(&ov7251->lock);
1312 sel->r = *__ov7251_get_pad_crop(ov7251, sd_state, sel->pad,
1314 mutex_unlock(&ov7251->lock);
1337 struct ov7251 *ov7251 = to_ov7251(subdev);
1340 mutex_lock(&ov7251->lock);
1343 ret = pm_runtime_get_sync(ov7251->dev);
1347 ret = ov7251_pll_configure(ov7251);
1349 dev_err(ov7251->dev, "error configuring PLLs\n");
1353 ret = ov7251_set_register_array(ov7251,
1354 ov7251->current_mode->data,
1355 ov7251->current_mode->data_size);
1357 dev_err(ov7251->dev, "could not set mode %dx%d\n",
1358 ov7251->current_mode->width,
1359 ov7251->current_mode->height);
1362 ret = __v4l2_ctrl_handler_setup(&ov7251->ctrls);
1364 dev_err(ov7251->dev, "could not sync v4l2 controls\n");
1367 ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT,
1372 ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT,
1374 pm_runtime_put(ov7251->dev);
1377 mutex_unlock(&ov7251->lock);
1381 pm_runtime_put(ov7251->dev);
1382 mutex_unlock(&ov7251->lock);
1389 struct ov7251 *ov7251 = to_ov7251(subdev);
1391 mutex_lock(&ov7251->lock);
1392 fi->interval = ov7251->current_mode->timeperframe;
1393 mutex_unlock(&ov7251->lock);
1401 struct ov7251 *ov7251 = to_ov7251(subdev);
1405 mutex_lock(&ov7251->lock);
1406 new_mode = ov7251_find_mode_by_ival(ov7251, &fi->interval);
1408 if (new_mode != ov7251->current_mode) {
1409 ret = __v4l2_ctrl_modify_range(ov7251->exposure,
1415 ret = __v4l2_ctrl_s_ctrl(ov7251->exposure,
1420 ret = __v4l2_ctrl_s_ctrl(ov7251->gain, 16);
1424 ov7251->current_mode = new_mode;
1427 fi->interval = ov7251->current_mode->timeperframe;
1430 mutex_unlock(&ov7251->lock);
1456 static int ov7251_check_hwcfg(struct ov7251 *ov7251)
1458 struct fwnode_handle *fwnode = dev_fwnode(ov7251->dev);
1473 return dev_err_probe(ov7251->dev, ret,
1477 ret = dev_err_probe(ov7251->dev, -EINVAL,
1492 ret = dev_err_probe(ov7251->dev, -EINVAL,
1497 ov7251->link_freq_idx = i;
1505 static int ov7251_detect_chip(struct ov7251 *ov7251)
1510 ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_HIGH, &chip_id_high);
1512 return dev_err_probe(ov7251->dev, -ENODEV,
1515 ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_LOW, &chip_id_low);
1517 return dev_err_probe(ov7251->dev, -ENODEV,
1520 ret = ov7251_read_reg(ov7251, OV7251_SC_GP_IO_IN1, &chip_rev);
1522 return dev_err_probe(ov7251->dev, -ENODEV,
1526 dev_info(ov7251->dev,
1533 ov7251->i2c_client->addr);
1538 static int ov7251_init_ctrls(struct ov7251 *ov7251)
1544 v4l2_ctrl_handler_init(&ov7251->ctrls, 7);
1545 ov7251->ctrls.lock = &ov7251->lock;
1547 v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1549 v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1551 ov7251->exposure = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1553 ov7251->gain = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1555 v4l2_ctrl_new_std_menu_items(&ov7251->ctrls, &ov7251_ctrl_ops,
1560 pixel_rate = pixel_rates[ov7251->link_freq_idx];
1561 ov7251->pixel_clock = v4l2_ctrl_new_std(&ov7251->ctrls,
1566 ov7251->link_freq = v4l2_ctrl_new_int_menu(&ov7251->ctrls,
1570 ov7251->link_freq_idx,
1572 if (ov7251->link_freq)
1573 ov7251->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1574 if (ov7251->pixel_clock)
1575 ov7251->pixel_clock->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1577 hblank = OV7251_FIXED_PPL - ov7251->current_mode->width;
1578 ov7251->hblank = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1581 if (ov7251->hblank)
1582 ov7251->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1584 vblank_max = OV7251_TIMING_MAX_VTS - ov7251->current_mode->height;
1585 vblank_def = ov7251->current_mode->vts - ov7251->current_mode->height;
1586 ov7251->vblank = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops,
1591 ov7251->sd.ctrl_handler = &ov7251->ctrls;
1593 if (ov7251->ctrls.error) {
1594 v4l2_ctrl_handler_free(&ov7251->ctrls);
1595 return ov7251->ctrls.error;
1604 struct ov7251 *ov7251;
1609 ov7251 = devm_kzalloc(dev, sizeof(struct ov7251), GFP_KERNEL);
1610 if (!ov7251)
1613 ov7251->i2c_client = client;
1614 ov7251->dev = dev;
1616 ret = ov7251_check_hwcfg(ov7251);
1621 ov7251->xclk = devm_clk_get_optional(dev, NULL);
1622 if (IS_ERR(ov7251->xclk))
1623 return dev_err_probe(dev, PTR_ERR(ov7251->xclk),
1633 if (ret && !ov7251->xclk)
1636 clk_rate = clk_get_rate(ov7251->xclk);
1637 ov7251->xclk_freq = clk_rate ? clk_rate : rate;
1639 if (ov7251->xclk_freq == 0)
1642 if (!ret && ov7251->xclk) {
1643 ret = clk_set_rate(ov7251->xclk, rate);
1650 if (ov7251->xclk_freq == supported_xclk_rates[i])
1656 ov7251->xclk_freq);
1658 ov7251->pll_cfgs = ov7251_pll_cfgs[i];
1660 ov7251->io_regulator = devm_regulator_get(dev, "vdddo");
1661 if (IS_ERR(ov7251->io_regulator)) {
1663 return PTR_ERR(ov7251->io_regulator);
1666 ov7251->core_regulator = devm_regulator_get(dev, "vddd");
1667 if (IS_ERR(ov7251->core_regulator)) {
1669 return PTR_ERR(ov7251->core_regulator);
1672 ov7251->analog_regulator = devm_regulator_get(dev, "vdda");
1673 if (IS_ERR(ov7251->analog_regulator)) {
1675 return PTR_ERR(ov7251->analog_regulator);
1678 ov7251->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1679 if (IS_ERR(ov7251->enable_gpio)) {
1681 return PTR_ERR(ov7251->enable_gpio);
1684 mutex_init(&ov7251->lock);
1686 ov7251->current_mode = &ov7251_mode_info_data[0];
1687 ret = ov7251_init_ctrls(ov7251);
1693 v4l2_i2c_subdev_init(&ov7251->sd, client, &ov7251_subdev_ops);
1694 ov7251->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1695 ov7251->pad.flags = MEDIA_PAD_FL_SOURCE;
1696 ov7251->sd.dev = &client->dev;
1697 ov7251->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1699 ret = media_entity_pads_init(&ov7251->sd.entity, 1, &ov7251->pad);
1705 ret = ov7251_set_power_on(ov7251->dev);
1709 ret = ov7251_detect_chip(ov7251);
1717 ret = ov7251_read_reg(ov7251, OV7251_PRE_ISP_00,
1718 &ov7251->pre_isp_00);
1725 ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT1,
1726 &ov7251->timing_format1);
1733 ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT2,
1734 &ov7251->timing_format2);
1745 ret = v4l2_async_register_subdev(&ov7251->sd);
1751 ov7251_entity_init_cfg(&ov7251->sd, NULL);
1756 pm_runtime_disable(ov7251->dev);
1757 pm_runtime_put_noidle(ov7251->dev);
1759 ov7251_set_power_off(ov7251->dev);
1761 media_entity_cleanup(&ov7251->sd.entity);
1763 v4l2_ctrl_handler_free(&ov7251->ctrls);
1765 mutex_destroy(&ov7251->lock);
1773 struct ov7251 *ov7251 = to_ov7251(sd);
1775 v4l2_async_unregister_subdev(&ov7251->sd);
1776 media_entity_cleanup(&ov7251->sd.entity);
1777 v4l2_ctrl_handler_free(&ov7251->ctrls);
1778 mutex_destroy(&ov7251->lock);
1780 pm_runtime_disable(ov7251->dev);
1781 if (!pm_runtime_status_suspended(ov7251->dev))
1782 ov7251_set_power_off(ov7251->dev);
1783 pm_runtime_set_suspended(ov7251->dev);
1791 { .compatible = "ovti,ov7251" },
1806 .name = "ov7251",