Lines Matching refs:val
81 u8 val;
300 static int ov01a10_read_reg(struct ov01a10 *ov01a10, u16 reg, u16 len, u32 *val)
326 *val = get_unaligned_be32(data_buf);
331 static int ov01a10_write_reg(struct ov01a10 *ov01a10, u16 reg, u16 len, u32 val)
341 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
359 r_list->regs[i].val);
416 u32 val, offset;
423 ret = ov01a10_read_reg(ov01a10, OV01A10_REG_FORMAT1, 1, &val);
427 val = hflip ? val | FIELD_PREP(OV01A10_HFLIP_MASK, 0x1) :
428 val & ~OV01A10_HFLIP_MASK;
430 return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val);
436 u32 val, offset;
443 ret = ov01a10_read_reg(ov01a10, OV01A10_REG_FORMAT1, 1, &val);
447 val = vflip ? val | FIELD_PREP(OV01A10_VFLIP_MASK, 0x1) :
448 val & ~OV01A10_VFLIP_MASK;
450 return ov01a10_write_reg(ov01a10, OV01A10_REG_FORMAT1, 1, val);
462 exposure_max = ov01a10->cur_mode->height + ctrl->val -
476 ctrl->val);
480 ret = ov01a10_update_digital_gain(ov01a10, ctrl->val);
485 ctrl->val);
490 ov01a10->cur_mode->height + ctrl->val);
494 ret = ov01a10_test_pattern(ov01a10, ctrl->val);
498 ov01a10_set_hflip(ov01a10, ctrl->val);
502 ov01a10_set_vflip(ov01a10, ctrl->val);
886 u32 val;
888 ret = ov01a10_read_reg(ov01a10, OV01A10_REG_CHIP_ID, 3, &val);
892 if (val != OV01A10_CHIP_ID) {
894 OV01A10_CHIP_ID, val);